[rescue] SPARCstation 1 boot woes

[Maciej W. Rozycki]

On Sun, 2 Nov 2025, Mouse via rescue wrote:

> Delayed branches.
> 
> After a control transfer, often, the instruction following the control
> transfer instruction (in the "delay slot") gets executed before the
> control transfer happens.  I say "often" rather than "always" for two
> reasons: (1) some control transfers don't do this at all (trap
> instructions, for example); (2) control transfers that _can_ execute
> the delay slot instruction can be set to do so only under certain
> conditions (typically marked with ,a in assembly or disassembly, a for
> "annul").

 Also, I've been told, unlike with MIPS branch delay slots on SPARC it is 
valid to place another branch in a branch delay slot, in which case only a 
single instruction at the destination of the original branch will execute 
before moving on to the destination of the second branch.  Very confusing, 
but possibly helpful at times.  Even on MIPS it happened to me to write a 
piece of code jumping to a branch delay slot instruction, just to squeeze 
out every cycle in a performance-critical loop -- 25 years on and nobody's 
beaten that code on MIPS! ;)

  Maciej