[rescue] sun 3/60 update

[Romain Dolbeau]

Le mer. 21 mai 2025 à 18:52, Dan Moisa via rescue <rescue at sunhelp.org> a écrit :
> There was a thought to compress some of the MMU/PAL logic into a few larger CPLDs

All three of the MMU (U23[012]) and FCDECODE (U102) (they all need
upper memory address bits, so it factorizes some inputs) fit easily in
an ATF1504 in a 100-pins package. Probably need to be soldered by a
professional house with tha massive TQFP package, JLCPCB worked for me
(mostly) with ATF1502 for my variant of the SEthernet [1], the
IisiSEthernet.

Pull request sent for the PLD file, which obviously is untested. It's
just some rewrite work from the JED to Verilog (via a homegrown tool),
and then some copy/paste and search/replace to create the PLD. It
seems to be the more readable version to me (once you get past the '#
is OR' thing...), though I'm not sure I got all the conversion right
(I have very little confidence in my understanding of the negative
logic support, but it looks alright when you match to the architecture
specifications... except where the 3/60 ignore them! thanks to the
NetBSD kernel source code for confirming it!).

Cordially,

Romain

[1] <https://github.com/rhalkyard/SEthernet>
[2] <https://github.com/MelkhiorVintageComputing/IIsiSEthernet/>

-- 
Romain Dolbeau