[rescue] Sun 3/160 and CADDStation 32 deskside

[Dave McGuire]

  One could easily fill the address space with some nice low-power, high-density surface mount SRAMs.

                      -Dave

On August 14, 2025 12:21:08 PM Dan Moisa via rescue <rescue at sunhelp.org> wrote:
> It would be an interesting project to make a VME RAM board that uses
> simm/dimms.
>
> Dan.
>
> On Thu, Aug 14, 2025, 11:30 Mike Spooner via rescue <rescue at sunhelp.org>
> wrote:
>
>> There are base-address DIP switches and also configuration jumpers on the
>> 3/1xx memory boards, that you should check.
>>
>> Also, there is a P2-enable/disable jumper on the 3/160 CPU board.
>>
>> Both the above are briefly covered in James Birdsall's Sun Hardware FAQ at
>> https://www.unix-ag.uni-siegen.de/faqs/SUN-HW-FAQ.html
>>
>> Regards,
>> Mike
>>
>>
>> On 14 August 2025 09:06:39 BST, Romain Dolbeau via rescue <
>> rescue at sunhelp.org> wrote:
>>
>>> Le mer. 13 août 2025 à 20:34, Alan Perry <alanp at snowmoose.com> a écrit :
>>>
>>>> I have since found that I have a 3/160 memory board to add to the 4M on the 3/160 board I am using in the CADDStation. However it is broken and I am trying to debug it.
>>>
>>> Good luck!
>>>
>>> You probably already found that info, but just in case...
>>> The SUN 3/160 itself has some documentation on bitsavers:
>>> * schematics: <https://bitsavers.org/pdf/sun/sun3/3-100/Sun-3_160_Schematic_Jun88.pdf>
>>> * functionam overview:
>>> <https://bitsavers.org/pdf/sun/sun3/3-100/Sun-3_160_Functional_Overview.pdf>
>>> The second one calls the CPU board 2060, which also has some documents:
>>> * Hardware reference manual:
>>> <https://bitsavers.org/pdf/sun/sun3/3-100/800-1370-02_2060_CPU_Hardware_Reference_Manual.pdf>
>>> * Engineering manual:
>>> <https://bitsavers.org/pdf/sun/sun3/3-100/800-1386-13_2060_CPU_Engineering_Manual.pdf>
>>> There's also documents on how to place/configure the board in various
>>> VME systems.
>>>
>>> Unfortunately bitsavers doesn't appear to have documents pertaining to
>>> the memory boards themselves.
>>>
>>> But the CPU board documents clarify that the CPU accesses the memory
>>> board via the P2 bus, an extension to VME that Sun wired on the
>>> user-defined pins of the VME"s P2 connector and their own P3
>>> additional connector.
>>> So for the memory board and CPU board to communicate, they need to be
>>> placed in appropriate slots of an appropriate VME backplane. And other
>>> boards need to be placed in a way that match the requirements not just
>>> of the VME bus, but also the P2 bus, to enable use of the P2 and/or
>>> avoid conflicts.
>>>
>>> Cordially,
>>>
>>> _______________________________________________
>> rescue list - http://sunhelp.org/mailman/listinfo/rescue_sunhelp.org
>
>
>
> ----------
> _______________________________________________
> rescue list - http://sunhelp.org/mailman/listinfo/rescue_sunhelp.org


--
Dave McGuire, AK4HZ
New Kensington, PA