[rescue] sparc10 cpu - what to do.

Dave McGuire mcguire at neurotica.com
Sun Dec 18 12:48:09 CST 2016

On 12/18/2016 01:18 PM, Patrick Giagnocavo wrote:
> Isn't the Itanium the second or third time that Intel tried VLIW or
> VLIW like architectures?
> iAPX 432, up to 321 bits in length instructions
> i860 with program-accessible pipelines
> neither of these were total failures however for Intel, as the
> superscalar expert cut his teeth on these two and this experience was
> useful when he did the PentiumPRO chips; and the i860's graphics
> register design experience were later re-purposed into SIMD-ish MMX
> extensions for Pentium MMX.

  i860 wasn't a failure at all.  It just didn't displace x86, but was
that actually its intention? (that seems to be the measure of success or
failure for most people)  i860s were used in lots and lots of high-end
embedded applications, from high-speed printers to very high-end
graphics subsystems.

> My view: VLIW CPUs represent the ultimate in vendor lockin, given the
> complexity of the compilers needed.

  That's an interesting point, but compilers are "just software".  If
the architectures are fully documented, there's no reason why 3rd-party
compilers coulnd't be written.  Just look at GCC.

  VLIW is tough to program, but jeeze, it's not impossible.


Dave McGuire, AK4HZ
New Kensington, PA

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