[rescue] VME bus Suns?

Janet Campbell janet at foonly.com
Tue May 23 03:34:55 CDT 2006

On Tue, 23 May 2006, Per Sandstrom wrote:

> Janet Campbell wrote:
>> for each family.  Of the SPARC CPU boards, the 4/100, 4/200, 4/300 and
>> 4/400 were SPARC V7 (similar to the SparcStation 1 and friends) and the
>> 4/600 was a sun4m SPARC V8 board with sbus slots - essentially a
>> SparcStation 10 on a VME card.
> I believe the 4/200 (Sunrise) and 4/100 (Cobra) CPUs were actually SPARC
> V6. Remember they were announced in 1987 and 1988. The floating point
> processor was, in theory, optional. Don't know about 4/300 (Stingray)
> and 4/400 (Sunray) - they may very well have been V7.

Ok, this is from memory (and distant memory at that) so I welcome any 

The V7 architecture was published in 1986.  The Sunrise project had 
working V6 silicon around that time but it stayed in the labs - the mask 
was updated with V7 changes (and many bugfixes!) and used to fab the 
SF9010/MB86900 (same chip, different names).  A hardware FPU was not 
mandated by the V7 spec, in fact, early revs of the SparcStation 1 did not 
include one, but had a piggybacked daughterboard engineered (501-1454). 
At one point in time James L. and I had 20% of the production run of these 
boards sitting in our garage (long story).

The 4/300 and 4/400 used the 7C601, as did the SS2.  Both of these were 
V7, it was the bus architecture that differentiated the Campus machines 
from the VME crates.

I believe that the SWAP instructions and maybe almost possibly SETHI (23 
vs 22 bits?) were the main instruction-level differences between V6 and 
V7.  Patterson, Wu, the members of Robert Garner's group (or Bill Joy, for 
that matter) might remember - most is probably lost in the mists of time. 
My 1987 SPARC assembly guide doesn't even dip into V6 distinctions.

-Janet [sparkle]

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