[rescue] Perverse Question

Jeffrey J. Nonken jeff_work at nonken.net
Sun Jun 15 12:18:47 CDT 2003

On Sat, 14 Jun 2003 20:15:53 -0700 (PDT), Francisco Javier
Mesa-Martinez wrote:
>Actually the term, and this comes from the fish's mouth (we had a
>seminar with Peterson at one point) is that RISC has been
>for a long time. RISC doesn't mean few instructions in the ISA. The
>REDUCED in RISC means reduced number of cycles per instruction to
>the point
>that all integer instructions should take 1 clock cycle (after
>pipelining of course). Another thing that makes a RISC machine is a
>instruction, both in length of bits used to encode it and length of
>used to perfom it. This means that a simpler decoding logic can be
>achieved, and this leads to another main characteristic: NO

I think the Microchips qualify, then.

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