[rescue] looking for a Multia
adh at an.bradford.ma.us
Tue Aug 12 14:20:07 CDT 2003
"From: "Joshua D. Boyd" <jdboyd at celestrion.net>
"On Tue, Aug 12, 2003 at 11:09:22AM -0400, Dave McGuire wrote:
"> The Z8530's two ports are good to to 1Mbps. The problem is the
"> frequency of the clock input fed into the chip. The on-chip
"> programmable dividers divide that frequency down to generate the baud
"> rates...but if the main clock input isn't high enough, you won't get
"> high baud rates out of the dividers.
"> Is the U1's Z8530 fed a higher frequency than the older Suns?
"That's what I've been told repeatedly. Further, Sun seems to say that a
"SS20 or SSclassic only supports serial rates of 38400, while the U1
"supposedly supports higher.
from the ultra 1 creator service manual, page 194, sec. C.1.8:
The synchronous port supports data throughput up to 64 Kbaud. The
asynchronous port supports data throughput up to 76.8 Kbaud.
i've had my ss2 set for 76.8 ever since i loaded s2.5 back in the late
'90s. does it -really- support it? it works, reliably...
perusal of the header files suggests that the 8530 in any sparc - and
perhaps earlier - can be set as high as 76.8k, and no higher. it can
be externally clocked as high as 1M, but whether the kernel can track
that... and btw since the mid '90s it's been a custom core in a
multifuncion asic on the motherboard, not a 'real' chip.
Andrew Hay the genius nature
internet rambler is to see what all have seen
adh at an.bradford.ma.us and think what none thought
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