[rescue] Total corporate madness (

Francisco Javier Mesa-Martinez lefa at ucsc.edu
Thu Aug 7 13:04:03 CDT 2003

On Thu, 7 Aug 2003, Joshua D. Boyd wrote:

> On Thu, Aug 07, 2003 at 11:09:58AM -0500, Scott Newell wrote:
> > >BTW, have you looked at the Hitachi H8?  25mhz 16/32 bit risc, built in
> >
> > I'm curious--what about the H8 series would you describe as riscy?  I've
> > only used the H8/Tiny, so I'm not up on some of the higher end models, but
> > I see: lots of addressing modes, variable length instructions, instructions
> > that execute in various clock cycles, a few decimal adjust instructions,
> > and multiple/divide instructions.
> I generally have two theories of what constitutes RISCy.  Instictively,
> if it is a fairly strict load/store architecture, I tend to think RISC.
> Looking at the H8/3024 manual, I see that the only instructions that can
> use memory are the bit manipulation ones, and the movs, stack
> instructions, and LDC/STC.  So, technically, this might not define RISC,
> when I see it, I think RISC.

Usually RISC is the following:

Reg to Reg operations
Fixed Length Instructions
Single cycle operations (as hidden by the pipeline), except for FPU.
And very little else :)

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