Archive-name: sun-hdwr-ref/part4
Posting-Frequency: as revised
Version: $Id: part4,v 1.15 1995/11/24 02:13:53 jwbirdsa Exp $


                       THE SUN HARDWARE REFERENCE
                     compiled by James W. Birdsall
                        (jwbirdsa@picarefy.com)

                                PART IV
                                =======
                            BOARDS (cont'd)


BOARDS (cont'd)
===============

    Memory boards
    -------------

501-1013        1M Multibus
        One megabyte of zero-wait-state memory with parity, consisting
        of 144 64K x 1-bit chips. Connected to the processor by the
        Multibus P2 connector only; the Multibus P1 connector is used
        only for +5V and ground connections.

        Eight-position DIP switch U506 controls the address at which the
        board appears. The switches are all mutually exclusive. To make
        the board the first megabyte (starting at address 0), turn
        switch 1 ON and all others OFF. To make the board the second
        megabyte (starting at address 0x100000), turn switch 2 ON and
        all others OFF, etc. Via this method, the board may be set for
        any megabyte from the first to the eighth; the eighth is only
        available for memory when a monochrome display board is not
        present in the system.

        Power requirements are +5V @ 3A.

501-1020        2/50 1M VME
        The information on this and related boards is a bit spotty. The
        configurations shown below are only some of the possible
        configurations. Take with a grain of salt.

        J2100
          Unjumpered always.

        J2200   Base address
          1M:   3-4 jumpered, all others unjumpered

        J2201   Memory size
                1M @ 64Kx1      1M @ 256Kx1     2M @ 256Kx1     4M @ 256Kx1
                ----------      -----------     -----------     -----------
          1-2       UN              JU              UN              UN
          3-4       UN              JU              JU              UN
          5-6       JU              UN              UN              UN
          7-8       UN              JU              JU              JU
          9-10      JU              UN              UN              UN
          11-12     UN              UN              JU              JU
          13-14     JU              UN              UN              UN
          15-16     UN              UN              UN              JU

        J2202
          Not used.

501-1046        2/50 2M VME
        See 501-1020.

501-1047        2/50 4M VME
        See 501-1020. Note that this board cannot coexist with a 4M 2/50
        CPU, since the eighth megabyte is occupied by the monochrome
        framebuffer

501-1048        1M Multibus
        Laid out differently than 501-1013, but functionally the same.
        The address DIP switch is in a different location but is set in
        the same manner. See 501-1013.

501-1067        2/50 3M VME
        See 501-1020.

501-1079        2/50 0M VME
        See 501-1020. This board is intended as a host for the piggyback
        SCSI controller or Sky floating point processor.

501-1102        8M VME 3/2xx,3/4xx,4/2xx
        Eight megabytes of ECC memory consisting of 256K x 1-bit chips,
        with onboard refresh control.

        All locations are with component side up and the VME connectors
        away from you.

        There is a socket for a 220/270-ohm terminator pack 120-1613 at
        location F34 (U1203). Whether this terminator is installed
        depends on the machine the board is in, and the board's
        location.

        For a 3/2xx, the first memory board must be in VME slot 6 and
        must have the terminator pack installed. "Remove the terminator
        when expansion memory boards are installed in slots 2, 3, 4, and
        5" -- which is impossible because only four boards are
        supported, with the other three boards being in slots 2-4.
        Memory boards not in slot 6 should not have the terminator pack
        installed.

        For a 3/4xx or 4/2xx, the memory board in VME slot 1 should
        always have the terminator pack installed. If there are memory
        boards on both sides of the CPU, remove the terminator at U1411
        on the 3/4xx CPU and install a terminator pack on the memory
        board in slot 7.

        There are four jumpers.

        J0101   (block in far left corner)
          1-2   external clock                                  UNJUMPED
          3-4   ???                                             UNJUMPED

        J1101   Disable refresh (single jumper in far left)
          UNJUMPED

        J0301   probably not present

        J0302   near left corner (accessible through top of back edge,
                position 0 at bottom)
          0     first memory board
          1     second memory board
          2     third memory board
          3     fourth memory board

        There are five LEDs on the upper rear edge of the board. In
        normal operation, only the two green LEDs should be lit.

        UE      Uncorrectable error (when lit)          RED

        CE      Correctable error (when lit)            YELLOW

        DIS     CPU access disabled (when lit)          YELLOW

        CPU     CPU accessing memory                    GREEN
          This LED flickers because it is only lit when the CPU is
          actually accessing the memory on the board. If the LED is not
          flickering, that simply means you have more memory than you
          need at the moment -- the board is not being accessed
          significantly.

        REF     Refresh OK (when lit)                   GREEN
          If this LED is not lit, refresh has failed and the board
          should be repaired or replaced.

        Note that this board must be 501-1102-11 or later to use with
        the 3/4xx, the FPA, or the FPA+.

        Power requirements are 5V @ 12.3A.

501-1111        2M VME 3/75
        Two megabytes of memory and connectors for the piggyback SCSI
        board 501-1045.

        With the component side up and the VME connectors away from you,
        the D50 SCSI connector is in the near right corner, and the
        piggyback connectors are in the center and left middle. The
        memory is in the far right quadrant.

        Jumper J3101 at the left far edge should be jumped, and J3102
        just nearer should be unjumped.

        There are two eight-position DIP switches, each of which should
        have only one switch on, and all the rest off. Switch 1 is to
        the left. For this board, both should be set identically.

        U3118 and U3119
          1     not used
          2     start address 0x00200000 (is 3rd and 4th meg)
                 cannot be used with 4M CPU boards
          3     start address 0x00400000 (is 5th and 6th meg)
          4     start address 0x00600000 (is 7th and 8th meg)
          5     start address 0x00800000 (is 9th and 10th meg)
          6     start address 0x00A00000 (is 11th and 12th meg)
          7     start address 0x00C00000 (is 13th and 14th meg)
                 not documented for use with 2M CPU boards
          8     start address 0x00E00000 (is 15th and 16th meg)
                 not documented for use with 2M CPU boards

        Power requirements are +5V @ 1.8A.

501-1121        0M VME 3/75
        Same as 501-1111, but with no memory -- it was just a host for
        the piggyback SCSI board.

501-1122        4M VME 3/75
        Basically the same as 501-1111, but four megabytes of memory and
        different switch settings.

        Jumper J3101 aqt the left far edge should be unjumped, and J3102
        just nearer should be jumped.

        U3118
          1     not used
          2     start address 0x00200000 (is 3rd through 6th meg)
          3     start address 0x00400000 (is 5th through 8th meg)
                 not documented for 2M CPU boards
          4     start address 0x00600000 (is 7th through 10th meg)
                 not documented for 4M CPU boards
          5     start address 0x00800000 (is 9th through 12th meg)
                 not documented for 2M CPU boards
          6     start address 0x00A00000 (is 11th through 14th meg)
                 not documented for 4M CPU boards
          7     start address 0x00C00000 (is 13th through 16th meg)
                 not documented for 2M CPU boards
          8     not used

        U3119
          1     not used
          2     not used
          3     U3118 is 2
          4     U3118 is 3
          5     U3118 is 4
          6     U3118 is 5
          7     U3118 is 6
          8     U3118 is 7

        Power requirements are +5V @ 2.3A.

501-1131        2M VME 3/1xx
        See 501-1111. May be missing connectors for the piggyback SCSI
        board 501-1045, which was nominally used only on the 3/75.

501-1132        4M VME 3/1xx
        See 501-1122.

501-1232        4M Multibus
        Four megabytes of memory, with parity, consisting of 144 256K x 1
        chips, 120ns. 14-pin jumper at U1115, may control address. My board
        is the first 4M of RAM and pins 1-2, 3-4, 5-6, and 7-8 are jumped.

501-1254        32M VME 4/2xx
        Similar to 501-1102, but not compatible with 3/2xx (or 3/4xx?).
        See 501-1102, except:

        J0301   (single jumper in far right)
          UNJUMPED

        Power requirements are 5V @ 14A.

501-1298        8M XP cache 386i/150/250
        Up to sixteen 1M SIMMs (501-1424 or 501-1375) on an internal
        card with an edge connector.

        With component side up and the edge connector on the right,
        there are six jumpers in a block along the middle left edge.
        The left column is J1, J0, and J4 from far to near, and the
        right is J3, J3, and J5. "Jumpers on FAB 270-1298-01 do not
        affect system operation."

501-1317        16M 3U VME 4/330
        Up to sixteen 1M (501-1408, 501-1466, 501-1544, 501-1565, or
        501-1697) or 4M (501-1682) SIMMs on a 3U VME board for use in
        the 4/330 only.

        The memory comes in four banks, but has only two configurations:
        banks 0 and 1 filled, or all banks filled.

                VME connector
                                J0902
                                J0901

                -0-----U700------
                -0-----U701------
                -0-----U702------
                -0-----U703------
                -1-----U704------
                -1-----U705------
                -1-----U706------
                -1-----U707------

                -2-----U800------
                -2-----U801------
                -2-----U802------
                -2-----U803------
                -3-----U804------
                -3-----U805------
                -3-----U806------
                -3-----U807------

        J0901   SIMM count
          Jumped for eight SIMMs, unjumped for sixteen.

        J0902   SIMM size
          Jumped for 1M SIMMs, unjumped for 4M SIMMs.

        Power requirements are +5V @ 1.1A.

501-1325        4M XP cache 386i/150/250
        See 501-1298.

501-1333        32M VME 4/4xx
        Thirty-two megabytes of ECC memory with onboard refresh control.

        All locations are with component side up and the VME connectors
        away from you.

        There are four jumpers.

        J0101   Enable SET.RDY (single jumper in far left)              JUMPED

        J0301   32M/128M (single jumper in far middle)                  JUMPED

        J0302   32M/128M (single jumper in far middle)                  UNJUMPED

        J0310-J0315   (block in near left corner, accessible through top of
                       back edge, J0310 at bottom)
          0     first memory board (J0310 jumped)
          1     second memory board (J0311 jumped)
          2     third memory board (J0312 jumped)
          3     fourth memory board (J0313 jumped)
          4     fifth memory board (J0314 jumped)
          5     sixth memory board (J0315 jumped)

        There are five LEDs on the upper rear edge of the board. In
        normal operation, only the two green LEDs should be lit.

        UE      Uncorrectable error (when lit)          RED

        CE      Correctable error (when lit)            YELLOW

        DIS     CPU access disabled (when lit)          YELLOW

        CPU     CPU accessing memory                    GREEN
          This LED flickers because it is only lit when the CPU is
          actually accessing the memory on the board. If the LED is not
          flickering, that simply means you have more memory than you
          need at the moment -- the board is not being accessed
          significantly.

        REF     Refresh OK (when lit)                   GREEN
          If this LED is not lit, refresh has failed and the board
          should be repaired or replaced.

        Note that SunOS 4.0.3 only supports up to 256M of memory, and
        SunOS 4.1 (PSR A) requires the 4.1 PSR A Sun-4 PMEG patch to
        support over 256M of memory.

        Power requirements are +5V @ 15.6A.

501-1394        4M dynamic 386i/150
        Up to eight 1M SIMMs (501-1424) on an internal card with an edge
        connector.

        Note that CPU 501-1241-02 rev 03 or later is required for use
        with this board. CPU 501-1241-04 rev 01 or later is required for
        use with two or more of these boards.

501-1436        8M 3U VME 4/330
        See 501-1317.

501-1441        8M dynamic 386i/150
        See 501-1394.

501-1451        32M VME 3/4xx,4/2xx
        Similar to 501-1254, but compatible with 3/4xx (but not 3/2xx?).
        See 501-1254, except:

        Note that this board must be 501-1451-03 or later to use with
        the 501-1576 16M board.

501-1482        0M XP cache 386i/150/250
        See 501-1298, but can also use 501-1510 SIMMs.

501-1495        48M VME 4/3xx except 4/330
        Up to 48 1M or 4M SIMMs in six banks of eight.

        With component side up and VME connectors away from you:

                ----    ----    ----  VME connectors

                U2000   U1800   U1600
                bank4   bank2   bank0     Note that socket locations are
                U2007   U1807   U1607     silkscreened on the solder side
                                          (underside) of the board.
                U2100   U1900   U1700
                bank5   bank3   bank1
                U2107   U1907   U1707

        The three documented configurations are bank 0 only (8M or 32M),
        banks 0-2 (24M or 96M), or all six banks (48M or 192M).

        There are a variety of jumpers.

        J2304   BGR0 (leftmost of block in far left corner)             JUMPED

        J2305   BGR1 (left middle of block in far left corner)          JUMPED

        J2306   BGR2 (right middle of block in far left corner)         JUMPED

        J2307   BGR3 (rightmost of block in far left corner)            JUMPED

        J2308   IACK (single jumper in far left)                        JUMPED

        J2309   1M/4M (nearest of block in far right)
          Jump for 4M SIMMs, unjump for 1M SIMMs.

        J2310-J2312 CONF0-CONF2 (near middle to farthest of block in far right)

                banks filled    J2310       J2311       J2312
                ------------    -----       -----       -----
                     0          JUMPED      JUMPED      JUMPED
                    0-2         JUMPED      UNJUMPED    JUMPED
                    0-5         UNJUMPED    JUMPED      UNJUMPED

        Power requirements are +5V @ 4.3A (24M) or 5.3A (48M).

501-1563        24M VME 4/3xx except 4/330
501-1564        8M VME 4/3xx except 4/330
        See 501-1495.

501-1576        16M VME 3/4xx,4/2xx
        Similar to 501-1102 (but not compatible with 3/2xx?). See
        501-1102, except:

        J0301   (single jumper in far right)
          JUMPED

        Note that the 4/2xx requires boot PROM 3.0 or later when more
        than two of these boards are used.

501-1703        32M VME 4/3xx except 4/330
        See 501-1495.

501-1704        32M 3U VME 4/330
        See 501-1317.

501-1711        16M 3U VME 4/330
        See 501-1317.

501-1721        128M VME 4/4xx
        See 501-1333, except 128M of memory and:

        J0301   32M/128M (single jumper in far middle)                  UNJUMPED

        J0302   32M/128M (single jumper in far middle)                  JUMPED

        Note that the 4/4xx CPU requires boot PROM version 3.0 or later
        to support this board.

        Note that a correctable error on the sixth 128M board turns on
        the CE LED and turns off error logging. Reset power to clear
        this condition.

        Power requirements are +5V @ 13.7A.

501-1723        8M 3U VME 4/330
        See 501-1317.

501-1755        32M 3U VME 4/330
        See 501-1317.

501-1767        64M VME 4/6xx
        Up to one gigabyte of memory in four banks of sixteen 4M
        (501-1739 or 501-2460) or 16M (501-2060) SIMMs.

        With component side up and VME connectors away from you, the
        banks are:

                U????  BANK  LO/HI    U????  BANK  LO/HI        bits
        near    -----  ----  -----    -----  ----  -----        ----
         VME    U2008   3     bH1     U1605   0     3L0         24-31
                U2007   2     bL1     U1606   1     3H0         24-31
                U2006   3     bH0     U1607   0     3L1         24-31
                U2005   2     bL0     U1608   1     3H1         24-31
                U2004   3     aH1     U1601   0     2L0         16-23
                U2003   2     aL1     U1602   1     2H0         16-23
                U2002   3     aH0     U1603   0     2L1         16-23
                U2001   2     aL0     U1604   1     2H1         16-23
                U1908   3     9H1     U1505   0     1L0         8-15
                U1907   2     9L1     U1506   1     1H0         8-15
                U1906   3     9H0     U1507   0     1L1         8-15
                U1905   2     9L0     U1508   1     1H1         8-15
                U1904   3     8H1     U1501   0     0L0         0-7
                U1903   2     8L1     U1502   1     0H0         0-7
                U1902   3     8H0     U1503   0     0L1         0-7
                U1901   2     8L0     U1504   1     0H1         0-7

                U2208   3     fH1     U1805   0     7L0         56-63
                U2207   2     fL1     U1806   1     7H0         56-63
                U2206   3     fH0     U1807   0     7L1         56-63
                U2205   2     fL0     U1808   1     7H1         56-63
                U2204   3     eH1     U1801   0     6L0         48-55
                U2203   2     eL1     U1802   1     6H0         48-55
                U2202   3     eH0     U1803   0     6L1         48-55
                U2201   2     eL0     U1804   1     6H1         48-55
                U2108   3     dH1     U1705   0     5L0         40-47
                U2107   2     dL1     U1706   1     5H0         40-47
                U2106   3     dH0     U1707   0     5L1         40-47
                U2105   2     dL0     U1708   1     5H1         40-47
                U2104   3     cH1     U1701   0     4L0         32-39
                U2103   2     cL1     U1702   1     4H0         32-39
                U2102   3     cH0     U1703   0     4L1         32-39
                U2101   2     cL0     U1704   1     4H1         32-39
                          ^
                          | xx0 = LO byte, xx1 = HI byte

        The minimum configuration is sixteen SIMMs in bank 1.

        There is a large block of three-pin jumpers in the near center.
        From left to right (with pin 1 assumed nearest), they are:

        BANK 2,3 SIMMs
          SGL (1-2)     "single-sided" (4M) SIMMs
          DBL (2-3)     16M SIMMs

        BANK 2 INSTALLED
          OUT (1-2)     not installed
          IN  (2-3)     installed

        BANK 3 INSTALLED
          OUT (1-2)     not installed
          IN  (2-3)     installed

        BANK 3 SPEED
          100 (1-2)     100ns SIMMs
          80  (2-3)     80ns SIMMs (should always be 80ns?)

        BANK 2 SPEED
          100 (1-2)     100ns SIMMs
          80  (2-3)     80ns SIMMs (should always be 80ns?)

        BANK 1 SPEED
          100 (1-2)     100ns SIMMs
          80  (2-3)     80ns SIMMs (should always be 80ns?)

        BANK 0 SPEED
          100 (1-2)     100ns SIMMs
          80  (2-3)     80ns SIMMs (should always be 80ns?)

        BANK 1 INSTALLED
          OUT (1-2)     not installed
          IN  (2-3)     installed

        BANK 0 INSTALLED
          OUT (1-2)     not installed
          IN  (2-3)     installed (bank 0 must always be installed!)

        BANK 0,1 SIMMs
          SGL (1-2)     "single-sided" (4M) SIMMs
          DBL (2-3)     16M SIMMs

        Note that SunOS 4.1.2 or later is required to support this
        board.

        Power requirements are +5V @ 17.1A (0M).

501-1785        16M SIMM SPARCstation 10
        Power requirements are +5V @ 2.59A active, 0.075A standby.

501-1823        32M SBus 4/75 (SPARCstation 2) primary expansion memory
        This board connects to the SBus and to the CPU. Cable 530-1814
        connects J401 on this board to the SAX connector on the CPU
        board. It also has a secondary memory connector for the 501-1824
        secondary expansion memory.

        Power requirements are +5V @ 0.8A.

501-1824        32M SBus 4/75 (SPARCstation 2) secondary expansion memory
        This board connects to the SBus and the rest of the system only
        through the 501-1823 primary expansion memory. Hence, it cannot
        be installed without the 501-1823. Use standoff 240-1879 to mount
        it.

        Power requirements are +5V @ 0.8A.

501-1901        0M VME 4/6xx
        See 501-1767.

501-1930        64M SIMM SPARCstation 10
        Power requirements are +5V @ 2.59A active, 0.075A standby.

501-2001        2M NVSIMM SPARCstation 10
        Used to accelerate NFS writes to disks.

        Requires Solaris 2.2 and Prestoserve 2.4.1 software.

        Install the first NVSIMM in J0301 and the second in J0202.
        Either NVSIMMs or the SBus Prestoserve controller (370-1401) is
        supported.

        Jump J1001 (near the battery) to enable battery backup mode. The
        Panasonic BR3032 battery is not field-replaceable.

501-2197        1M NVSIMM SPARCserver 1000,SPARCcenter 2000
        Used to accelerate NFS writes to disks.

        Requires Solaris 2.2 and Prestoserver 2.4.1 software.

        The SPARCserver 1000 supports two banks of four NVSIMMs. The
        SPARCcenter 2000 supports one bank of eight NVSIMMs.

        There is a three-pin jumper in the lower right if the battery is
        facing you and on the left. Jump the right pair of pins to
        enable battery backup mode. Jump the left pair of pins to
        disable battery backup mode. The Panasonic BR2330 battery is not
        field-replaceable.

501-2273        16M SIMM SPARCstation 10
        See 501-1785.

501-8030        12M 6U VME 3/E
        Twelve megabytes of memory on a 6U VME card.

        With component side up and the VME connectors on the left, there
        is a jumper block (J100) in the lower left, with pin 1 nearest:

        J100
          1-2   unused, no pins
          3-4   enable 1st 4M bank                              JUMPED
          5-6   enable 2nd 4M bank                              JUMPED
          7-8   enable 3rd 4M bank                              JUMPED

        Power requirements are +5V @ 2A.

501-8031        4M 6U VME 3/E
        Four megabytes of memory on a 6U VME card.

        With component side up and the VME connectors on the left, there
        is a jumper block (J100) in the lower left, with pin 1 nearest:

        J100
          1-2   unused, no pins
          3-4   start address 0x00400000 (4th through 7th meg)
          5-6   start address 0x00800000 (8th through 11th meg)
          7-8   start address 0x00C00000 (12th through 16th meg)

        Only one pair of pins should be jumped.

        Power requirements are +5V @ 1.1A.

501-8036        16M 6U VME 4/E
        Up to sixteen megabytes of error-correcting memory with onboard
        refresh control.

        With component side up and VME connectors on the left, the banks
        are:

                        J502
                        J503
                        J504
                        J505
                        J506            LED505 (UCERR)
                        J501            LED504 (CERR)
                                        LED503 (REFRESH)
                                        LED502 (ACCESS)
                                        LED501 (DISABLED)

                bank0           bank2

                bank1           bank3

        The only documented configurations are bank 0 only (4M) and all
        banks (16M).

        J0501   "address range"                                         UNJUMPED

        J0502   board size
          Jumped for 16M, unjumped for 4M.

        J0503   board ID
          Jumped for 16M, unjumped for 4M.

        J0504   "hi/low mem" (actually sets base address)
        J0505   "1/4M DRAM" (actually sets base address)
        J0506   "address range"

            J0504       J0505       J0506       base address
            -----       -----       -----       ------------
            UNJUMPED    UNJUMPED    JUMPED      0x00000000
            UNJUMPED    JUMPED      JUMPED      0x01000000
            JUMPED      UNJUMPED    JUMPED      0x02000000
            JUMPED      JUMPED      JUMPED      0x03000000
            UNJUMPED    UNJUMPED    UNJUMPED    0x10000000
            UNJUMPED    JUMPED      UNJUMPED    0x11000000
            JUMPED      UNJUMPED    UNJUMPED    0x12000000
            JUMPED      JUMPED      UNJUMPED    0x13000000

          The 4M board extends from the base address to 0xnn3FFFF, and
          the 16M board extends to 0xnnFFFFF.

        The LEDs appear to to be:

                UCERR   uncorrectable error     probably shouldn't be lit
                CERR    correctable error       probably shouldn't be lit
                REFRESH refresh OK              probably should be lit
                ACCESS  memory being accessed   probably should flicker
                DISABLED CPU access disabled    probably shouldn't be lit

501-8042        4M 6U VME 4/E
        See 501-8036.

501-8060        0M combo with SBus slots 6U VME 4/E
        Up to sixteen SIMMs (of unknown size) and two SBus slots.

        With component side up, the banks are:


                S        B      B
                B        a      a
                u        n      n
                s        k      k
                2        1      3
                   J0401
                S
                B
                u        B      B
                s        a      a
                1        n      n
                         k      k
                         0      2

        SBus slot 1 can support a master or slave card; slot 2 can only
        support slave cards.

        J0401   enable memory
          Jump to enable, unjump to disable.

        Note that SunOS 4.0.3e requires the 4.0.3e SRX Feature tape to
        support this board.

555-1054        0M XP cache 386i/150/250
        See 501-1298.

555-1423        0M dynamic 386i/150
        See 501-1394.


    Video boards
    ------------

VIDEO STANDARDS

    MONO

        bwone

                Sun-1 monochrome framebuffer.

        bwtwo

                The standard monochrome framebuffer, found in everything
                from the first Sun-2 to desktop SPARCs, and the 386i as
                well. Standard resolution is 1152 x 900 and high
                resolution is 1280 x 1024; other resolutions (1024 x
                1024?) may exist.

    MG

   "MG" framebuffers are actually bwtwo.

    COLOR

   Note that the ROM monitor in a machine may or may not know about any
particular color framebuffer, depending on the revision of the ROM and
the age of the framebuffer standard. If the ROM does not know how to
detect/display on the particular color framebuffer you have installed,
it will be unable to display the normal ROM boot messages. This does not
affect OS support for the framebuffer; if you are willing to boot blind,
SunOS should find the framebuffer and start displaying on it normally.
The alternative is to get a more recent ROM or a different framebuffer.

        cgone

                Sun-1 color framebuffer. Can run SunWindows. The
                hardware occupies 16K of Multibus address space, by
                default starting at addresses 0xE8000 or 0xEC000 and
                using interrupt level 3.

        cgtwo

                VME-based color framebuffer found in Sun-2's and up. The
                hardware occupies 4M of VMEbus address space, by default
                starting at address 0x400000 and using interrupt level
                4.

        cgthree

                8-bit color framebuffer found in Sun-4's and Sun-386i's.

        cgfour

                8-bit color framebuffer, found in Sun-3's and Sun-4's,
                with a monochrome overlay plane and an overlay enable
                plane on the 3/110 and some 3/60 models. It is the
                onboard framebuffer for the 3/110. The SunOS driver
                implements ioctls to get and put colormaps; the 3/60
                models have an overlay plane colormap as well.

        cgfive

                Equivalent to cgtwo. Can be used alone or with the
                GP/GP+/GP2 accelerators.

        cgsix

                8-bit accelerated (GX) color framebuffer, found in
                Sun-3's and Sun-4's. The GX accelerator is a low-end
                accelerator designed to enhance vector and polygon
                drawing performance.

        cgeight

                24-bit color framebuffer, found in Sun-3's and Sun-4's,
                with a monochrome overlay plane and in some cases an
                overlay enable plane as well. Despite being 24-bit, the
                SunOS driver is documented as implementing ioctls to get
                and put colormaps.

        cgnine

                24-bit double-buffered VME-based color framebuffer, with
                two overlay planes and the ability to work with the GP2
                graphics accelerator board. In double-buffer mode, color
                resolution is reduced to 12 bits.

        cgtwelve

                24-bit double-buffered SBus-based color framebuffer,
                with graphics accelerator, an overlay plane and an
                overlay enable plane. Apparently can run in an 8-bit
                colormapped mode as well. In double-buffer mode, color
                resolution is reduced to 12 bits.

        cgfourteen

                From the manpage: "The cgfourteen device driver controls
                the video SIMM (VSIMM) component of the video and graphics
                subsystem of the SPARCstation 10SX. The VSIMM provides
                24-bit truecolor visuals in a variety of screen
                resolutions and pixel depths."


    ACCELERATORS

        gpone

                Generic name for Graphics Processor (GP), Graphics
                Processor Plus (GP+), and Graphics Processor 2 (GP2)
                boards. The hardware occupies 64K of VMEbus address space,
                starting at address 0x210000 by default and using interrupt
                level 4.

        taac

                The TAAC is somewhere between a general application
                accelerator and a graphics accelerator. It is "a
                very-long-instruction-world computation engine, coupled
                with an 8M memory array. This memory area can be used as
                a frame buffer or as storage for large data sets."

VIDEO BOARDS

    MONO

501-1003        monochrome video/keyboard/mouse TTL only Multibus
        From top to bottom on the rear edge of the board are a female
        DB-9 video connector, a header connector for the serial type 2
        keyboard, and a header connector for the serial Sun-2 mouse.

        This board must be placed in a slot in the Multibus P2
        section shared by the CPU. For backplane P/N 501-1090, it must
        be placed in slot 6 to terminate the P2 bus; for newer
        backplanes, it is usually placed in slot 6 anyway.

        DIP switch and jumper information for revisions -03 through -07:

        U100    DIP switch      video board address
          Eight-position DIP switch. All switches are mutually exclusive
          and they correspond to megabyte sections of the address space
          in the same way as the 501-1013 memory board. The first video
          board must be set to the eighth megabyte, which means switch
          eight must be ON and all others must be OFF.

        J1903   jumper          serial interrupt level select
          pins 13-14 jumped by default, all others unjumped

        J1904   jumper          video interrupt level select
          pins 9-10 jumped by default, all others unjumped

        Power requirements are +5V @ 4A.

501-1052        monochrome video/keyboard/mouse ECL/TTL Multibus
        Appears as device bwtwo*.

        From top to bottom on the rear edge of the board are a female
        DB-9 video connector, a header connector for the serial type 2
        keyboard, and a header connector for the serial Sun-2 mouse.

        This board must be placed in a slot in the Multibus P2
        section shared by the CPU. For backplane P/N 501-1090, it must
        be placed in slot 6 to terminate the P2 bus; for newer
        backplanes, it is usually placed in slot 6 anyway.

        Jumper information (note that pin 1 is to the right if you
        hold the board with the printing right-side up -- the same
        orientation as the ICs):

        J1600
          Bits read on startup to determine size of screen, either
          standard (1152 x 900) or 1000 x 1000. Pins 9 through 16 are
          not used and unjumped. Pins 3-4, 5-6, and 7-8 are always
          jumped. Pins 1-2 are jumped for the standard screen and
          unjumped for the 1000 x 1000 screen.

        J1801   Crystal Shunt                   JUMPED by default
          When jumped, the crystal signal is active; when unjumped, the
          crystal is disabled for A.T.E. testing.

        J1803   video levels
          To select TTL (very early Sun-2 monitors), jump pins 1-2 and
          5-6, unjump 3-4 and 7-8. To select TTL/ECL (all monochrome
          monitors since then, including any that can work with
          Sun-3's), jump 3-4 and 7-8 and unjump 1-2 and 5-6.

        J1804   Ground test point               UNJUMPED by default
          Used during troubleshooting only.

        J1903   Serial interrupt level select
                 Located at N3, farther away from the bus connectors.
          pins 13-14 jumped by default, all others unjumped

        J1904   Video interrupt level select
                 Located at N3, nearer the bus connectors.
          pins 9-10 jumped by default, all others unjumped

        Power requirements are +5V @ 4A.

501-1243        386i/150/250 cgthree color framebuffer 1152x900
        Appears as cgthree0. Has one video/keyboard connector. Video
        output is 1152 x 900, 66Hz vertical refresh, 61.8KHz horizontal
        sync.

        The keyboard fuse F1 is a 1A subminiature, 140-1027-01.

501-1244        386i/150/250 monochrome framebuffer 1152x900
        Appears as bwtwo0. Has one video/keyboard connector. Video
        output is 1152 x 900, 66Hz vertical refresh, 61.8KHz horizontal
        sync.

        The keyboard fuse F600 is a 1A subminiature, 140-1027-01.

501-1247        mgthree monochrome framebuffer ECL/TTL P4
        Supported in 3/60, 3/80, 3/4xx, 4/1xx, 4/3xx, and 4/4xx. Appears
        as bwtwo0. DB9 ECL/TTL video output, switchable between 1152 x
        900, 66Hz vertical refresh, 61.8KHz horizontal sync, and 1600 x
        1280.

        J5401   Resolution (single jumper near DB9)
          jumped        1600 x 1280
          unjumped      1152 x 900/auto select

        Note that the auto-select feature requires cables 530-1336 or
        530-1359 to operate. If using Motorola high-resolution monitor
        540-1427, it must be Motorola revision T or later for the
        auto-select feature to operate.

        Note that EEPROM/NVRAM location 0x1F should be set to 0x20 to
        use this framebuffer (see EEPROM/NVRAM Parameters).

        Power requirements (501-1247 only) are +5V @ 0.8A, -5V @ 1.2A.

501-1286        386i/150/250 cgthree color framebuffer 1024x768
        Appears as cgthree0. Has one video/keyboard connector. Video
        output is 1024 x 768, 66Hz vertical refresh, 53.6KHz horizontal
        sync.

        The keyboard fuse F600 is a 1A subminiature, 140-1027-01.

501-1352        386i/150/250 GXi color framebuffer.
        Appears as cgfive0. Has a 21W4 connector. Video output is 1152 x
        900, 66Hz vertical refresh, 61.8KHz horizontal sync.

        Takes up to four 1M SIMMs at locations J1000-J1003. "1MB SIMM
        modules are not installed [...] on the 2D GXi board."

        The keyboard fuse F1 is a 1A subminiature, 140-1027-01.

        Note that Openwindows does not support the GXi.

        The 386i CPU requires boot ROM version 4.3 or later.

501-1397        386i/150/250 SunVGA/EGA ISA
        Apparently an ISA-bus board which simulates an EGA or VGA
        display for DOS programs running on the 386i.

        S1      ISA-bus address (block, switch 1 nearest daughterboard)
            By default, set for address 0xA000.
          1     ON
          2     OFF
          3     ON
          4     OFF

        Note that this board requires a color framebuffer and SunOS
        4.0.1.

501-1402        mgfour monochrome framebuffer ECL/TTL/Analog P4 3/80 backpanel
        Supported in 3/80, 3/4xx, 4/3xx, and 4/4xx. Appears as bwtwo0.
        DB9 ECL/TTL or 13W3 analog video output, 1152 x 900, 66Hz
        vertical refresh, 61.8KHz horizontal sync.

        Power requirements are +5V @ 3.3A.

501-1433        386i/150/250 monochrome framebuffer 1024x768
        Appears as bwtwo0. Has one video/keyboard connector. Video
        output is 1024 x 768, 76Hz vertical refresh, 63.9KHz horizontal
        sync.

        The keyboard fuse F600 is a 1A subminiature, 140-1027-01.

        The 386i CPU requires boot ROM version 4.4 or later.

501-1567        386i/150/250 monochrome framebuffer 1152x900
        See 501-1244.

501-1568        386i/150/250 monochrome framebuffer 1024x768
        See 501-1433.

501-1637        mgthree monochrome framebuffer ECL/TTL P4 3/80 backpanel
        See 501-1247. Requires 501-1483 DC to DC power converter.

501-8020        3/E monochrome framebuffer ECL/TTL 6U VME
        Appears as device bwtwo0. DB9 ECL/TTL video output, 1152 x 900,
        66Hz vertical refresh, 61.8KHz horizontal sync.

        Power requirements are +5V @ 3A.


    COLOR

501-0289        cgone(?) color framebuffer Multibus
        Jumper information:

        J1
          1-2   VODD                    JUMPED by default
          3-4   VRESET                  JUMPED by default
          5-6   SYSCP1                  JUMPED by default
          7-8   HRESET                  JUMPED by default
          9-10  STATE 11                JUMPED by default

        J2
          1-2   M0                      JUMPED by default
          3-4   M1                      JUMPED by default
          5-6   M2                      JUMPED by default
          7-8   M3                      JUMPED by default
          9-10  M4                      JUMPED by default
          11-12 M5                      JUMPED by default

        J3              Color board interrupt level
          pins 5-6 jumped by default, all others unjumped

        J4              Invert BBUS.A0
          1-2                           JUMPED by default
          3-4                           UNJUMPED by default

        J5              Ground the P2 bus
          All pins (1-2, 3-4, 5-6, 7-8, 9-10, 11-12) jumped by default.

        Power requirements are +5V @ 6A and -5V @ 1.2A.

501-1014        cgtwo (2160) color framebuffer VME
        Initially designed for the 2/130 and 2/160, also supported in
        the 3/1xx, 3/2xx, and 3/4xx. Appears as device cgtwo*.

        All locations are with component side up and VME connectors away
        from you.

        Output resolution 1152 x 900, 66Hz vertical refresh, 61.8KHz
        horizontal sync. Four BNC connectors (sync, blue, green, and
        red, with red nearest the right edge/bottom).

        There are three jumpers.

        J100    base address (block in far left corner, pins 3 and 4 on
                 left side farthest to nearest, pins 1 and 2 on right
                 side farthest to nearest)
            Set base address to 0x400000:
          1-3   hardwired on fabs 270-1014-02/03, jumped on fabs
                270-1014-05/06.
          3-4   hardwired

        J200    sense bits (block in far right corner, pin 1 to right)
          1-2   sense bit 0                                     UNJUMPED
          3-4   sense bit 1                                     UNJUMPED
          5-6   sense bit 2                                     UNJUMPED
          7-8   sense bit 3                                     UNJUMPED

        J1700   enable clock (single jumper in right middle)
          Jumped by default.

        Power requirements are +5V @ 15A, -5V @ 5.7A, and -12V @ 0.2A.

501-1058        GB graphics buffer VME
        Initially designed for the 2/130 and 2/160, also supported in
        the 3/160, 3/180, 3/2xx, 3/4xx, 4/150, 4/2xx, 4/3xx. Used with
        the 501-1055 GP graphics processor or the 501-1139 GP+ graphics
        processor. Has no device name.

        All locations are with component side up and VME connectors away
        from you.

        There are six jumpers.

        J1      GND test point (single jumper in near left corner)      UNJUMPED

        J2      GND test point (single jumper in far left)              UNJUMPED

        J3      Manual reset test point (single jumper in left middle)  UNJUMPED

        J4      buffer size (block in left middle, pins 4 and 1 nearest L/R)
          2-3   Jumped for 2M buffer.

        J5-J8   Refresh interval test points (block in far right, J5 nearest)
          J5    bit 0, hardwired.
          J6    bit 1, hardwired.
          J7    bit 2, hardwired.
          J8    bit 3, hardwired.

        J9      GND test point (single jumper in near right corner)     UNJUMPED

        J10     GND test point (single jumper in far right corner)      UNJUMPED

        Note that the 2/160 power supply requires RC network
        540-1300-01.

        Power requirements are +5V @ 2.1A.

501-1089        cgthree (3160) color framebuffer double-buffered VME
        Initially designed for the 3/160, also supported in the 3/150,
        3/180, 3/2xx, 3/4xx, 4/1xx, 4/2xx, and 4/3xx. Appears as device
        cgthree*.

        All locations are with component side up and VME connectors away
        from you.

        Output resolution is 1152 x 900, 66Hz vertical refresh, 61.8KHz
        horizontal sync. Five BNC connectors ("24-bit", sync, blue,
        green, red, with red nearest the right edge/bottom).

        There are a variety of jumpers.

        J100    (single jumper between sync and blue connectors)
          "Factory set".

        J101    (single jumper between blue and green connectors)
          "Factory set".

        J102    (single jumper near "24-bit" connector)
          Jumped.

        J300    (block in far middle, pin 1 to left)
          All pins unjumped by default.

        J301    VME address (block in far left, pin 1 to left)
            Default address 0x400000.
          1-2   unjumped
          3-4   hardwired
          5-6   unjumped
          7-8   unjumped
          9-10  hardwired
          11-12 unjumped
          13-14 hardwired
          15-16 hardwired

        J302    (small block in far left)
          1-2   unjumped
          3-4   hardwired

        J303    (small block in far left, pin 1 to right)
          1-2   hardwired
          3-4   unjumped

        J400    (block in middle left edge, pin 1 to left)
            Resolution 1152 x 900:
          1-2 (J8)      unjumped
          3-4 (J9)      unjumped
          5-6 (J10)     unjumped
          7-8 (J11)     unjumped
          9-10 (J12)    VME port and GP port                    UNJUMPED
          11-12 (J13)   VME port fast read                      JUMPED
          13-14 (J14)   unjumped
          15-16 (J15)   unjumped

        J600    (single jumper between green and red connectors)
          "Factory set."

        J601    (single jumper in middle near edge)
          "Factory set."

        Note that SunOS 3.5 (for Sun-3's) or SunOS 4.0 (for Sun-4's) is
        required to support the double-buffer features.

        Power requirements are +5V @ 8.3A, -5V @ 3.1A, +12V @ 0.1A, -12V
        @ 0.2A.

501-1116        cgthree (3160) color framebuffer single-buffered VME
        See 501-1089, but single-buffered.

        For 501-1116-05 and earlier, jumper J400 pins 11-12 (J13) is
        unjumped.

        Power requirements are +5V @ 8.2A, -5V @ 2.9A, +12V @ 0.1A, -12V
        @ 0.2A.

501-1210        3/60 cgfour color framebuffer P4
        Appears as devices cgfour0 and bwtwo1. Supported only in the
        3/60.

        4BNC connectors (sync, blue, green, and red, from left to right
        with component side up and connectors nearest), 1152 x 900, 66Hz
        vertical refresh, 61.8KHz horizontal sync.

        Note that EEPROM/NVRAM location 0x1F should be set to 0x12 to
        use this framebuffer as the console.

        Power requirements are +5V @ 2.6A.

501-1248        cgfour color framebuffer P4
        Appears as devices cgfour0 and bwtwo1. Supported in the 3/60,
        3/80, 3/4xx, 4/1xx, 4/3xx, and 4/4xx.

        4BNC connectors (sync, blue, green, and red, from left to right
        with component side up and connectors nearest), 1152 x 900, 66Hz
        vertical refresh, 61.8KHz horizontal sync.

        J700    Enable clock (single jumper in corner)
          JUMP to enable clock.

501-1267        cgfive color framebuffer VME
        Supported in the 3/150, 3/160, 3/180, 3/2xx, 3/4xx, 4/1xx,
        4/2xx, 4/3xx, and 4/4xx. Appears as device cgtwo* (?).

        All locations are with component side up and VME connectors away
        from you.

        Output resolution is 1152 x 900, 66Hz vertical refresh, 61.8KHz
        horizontal sync. Four BNC connectors (sync, blue, green, red,
        with red nearest the right edge/bottom).

        There are five switch blocks and two jumpers:

        SW300   VME address high (switch block in far edge left @ D37,
                 switch 1 to left)
          VME address lines A24 (switch 1) to A31 (switch 8). All OFF by
          default.

        SW301   VME address low etc. (switch block in far left corner @
                 B34, switch 1 to left)
          1     VME A22 decode                                          OFF
          2     VME A23 decode                                          ON
          3     AM4 decode                                              OFF
          4     AM5 decode                                              OFF
          5     2M H/L decode                                           ON
          6     2/4M A21 decode                                         OFF
          7     2/4M X.A21 decode                                       ON
          8     2/4M X.A21                                              ON

        SW302   Decoding (switch block in far edge left @ D36, just
                 nearer than SW300, switch 1 to left)
          1     Control space 2/4M decode                               ON
          2     Control space 2/4M decode                               OFF
          3     24/32-bit address decode (24-bit)                       OFF
          4     24/32-bit address decode (24-bit)                       ON
          5-8   unused

        SW400   Status bits (switch block in left edge middle @ A20,
                 switch 1 to left)
          1     status bit 8 (resolution)                               OFF
          2     status bit 9 (resolution)                               OFF
          3     status bit 10 (resolution)                              OFF
          4     status bit 11 (resolution)                              OFF
          5     status bit 12 (extra registers)                         ON
          6     status bit 13 (fast read)                               ON
          7     status bit 14 (RFU)                                     OFF
          8     status bit 15 (RFU)                                     OFF

        SW3300  Board select/P2 (switch block in far right @ H34, switch
                 1 to left)
          1     board 0                                                 ON
          2     board 1                                                 OFF
          3     board 2                                                 OFF
          4     board 3                                                 OFF
          5     P2 bus enable. ON when used with the GP2 graphics
                 accelerator, OFF otherwise.
          6-8   unused

        J600    Video settings (block in near left, pin 1 to left)
          1-2   V reset                                         JUMPED
          3-4   Ext vertical blank output to ground             UNJUMPED
          5-6   Ext display buffer A output to ground           UNJUMPED
          7-8   unused                                          UNJUMPED

        J601    Video settings (block in near left, to left of J600, pin
                 1 to left)
          1-2   Green sync                                      JUMPED
          3-4   Green sync                                      UNJUMPED
          5-6   Sync                                            UNJUMPED
          7-8   Sync                                            JUMPED

        Note that this board can be used with 4/3xx CPUs 501-1316-03 or
        later only (don't know about 501-1742).

        Note that this board must be 501-1267-05 or later to use with
        the 501-1539 ISP-80 IPI disk controller.

        Power requirements are +5V @ 8.8A, -5V @ 3.2A, +12V @ 0.2A, -12V
        @ 0.1A.

501-1319        cgthree (3160) color framebuffer 1024x1024 VME
        See 501-1089, but single-buffered (?) and resolution is 1024 x
        1024 and jumper J400 pins 1-2 (J8) is jumped.

501-1371        cgeight color framebuffer P4
        Supported in the 3/60 (?), 3/4xx, 4/1xx, and 4/3xx. Appears as
        device cgeight0.

        4BNC connector. 1152 x 900, 66Hz vertical refresh, 61.8KHz
        horizontal sync.

        Note that SunOS 4.0 CG8 (not upgradeable to 4.0.1), or 4.0.3 or
        later is required. The cgeight is not supported under
        OpenWindows version 2.

        Note that EEPROM/NVRAM location 0x1F should be set to 0x20 to
        use this framebuffer as the console (see EEPROM/NVRAM
        Parameters).

        Note that this board must be 501-1371-04 or later to use with
        3/4xx (501-1299/1550) or 4/3xx (501-1381/1899) CPUs.

        Power requirements are +5V @ 5.5A.

501-1374        cgsix color framebuffer P4
        Supported in the 3/60, 3/80, 3/4xx, 4/1xx, 4/3xx, and 4/4xx.
        Appears as device cgsix0.

        All locations are with component side up and 13W3 connector
        toward you.

        13W3 connector. 1152 x 900, 66Hz vertical refresh, 61.8KHz
        horizontal sync.

        J100    Monitor ID (single jumper in far right)         UNJUMPED

        J500    (single jumper in left middle)                  JUMPED
          "V.Y. CLK memory control."

        J501    (single jumper in left middle, farther than J500) UNJUMPED
          "OSC 2 CLK."

        J900    (three-pin jumper in far left, pin 1 farthest)
          1-2
          2-3   1152 x 900 on 270-1532 fab.

        Note that the 3/60, 4/1xx, and 4/3xx require boot PROM version
        3.0 or later to use this framebuffer as the console. Also note
        that EEPROM/NVRAM location 0x1F should be set to 0x20 to use
        this framebuffer as the console (see EEPROM/NVRAM Parameters).

        Note that SunOS 4.0.3 or later is required.

        Power requirements are +5V @ 3.5A.

501-1434        cgine color framebuffer VME
        Supported in the 3/2xx, 3/4xx, 4/150, 4/2xx, 4/3xx, and 4/4xx.
        Appears as device cgnine*.

        All locations are with component side up and VME connectors away
        from you.

        Output resolution is 1152 x 900, 66Hz vertical refresh, 61.8KHz
        horizontal sync. One 13W3 connector.

        There are three switch blocks and two jumpers:

        SW1     VME address (switch block in far left, S0100, switch 1
                 to left)
          VME address lines A24 (switch 1) to A31 (switch 8). All ON by
          default except switch 4 (A27), which is OFF.

        SW2     (switch block in far left, S0101, switch 1 to left)
          1     unused
          2     unused
          3     Flag                                                    ON
          4     unused
          5     A32 mode                                                OFF
          6     AM4                                                     ON
          7     AM5                                                     ON
          8     A23 mode                                                ON

        SW3     Board select/P2 (switch block in far left, S0700, switch
                 1 to left)
          1     P2 bus enable. ON when used with the GP2 graphics
                 accelerator, OFF otherwise.
          2     board 3                                                 OFF
          3     board 2                                                 OFF
          4     board 1                                                 OFF
          5     board 0                                                 ON
          6-8   unused

        J1800   Video settings (block in near left)
          1-2   Display                                         UNJUMPED
          3-4   Video blank                                     UNJUMPED
          5-6   unused                                          UNJUMPED
          7-8   unused                                          UNJUMPED

        J601    Video settings (block in near right, pin 1 to left)
          1-2   Green sync                                      UNJUMPED
          3-4   Sync                                            JUMPED

        Note that this board can be used with GP2 boards 501-1268-07 or
        later only, and is not compatible with the 501-1055 GP or
        501-1139 GP+ boards.

        Note that this board must be 501-1434-04 or later for use with
        the 501-1249 Xylogics 7053 SMD disk controller.

        Note that this board is not supported under OpenWindows version
        2 and possibly 3.

        Power requirements are +5V @ 14.6A.

501-1443        cgfour color framebuffer P4 3/80 backpanel
        As 501-1248, but with 3/80 backpanel and 13W3 instead of 4BNC.

        Power requirements are +5V @ 3.8A.

501-1505        cgsix color framebuffer P4 3/80 backpanel
        As 501-1374, but:

        Power requirements are +5V @ 4.9A.

501-1518        cgeight color framebuffer P4
        As 501-1371, but with 13W3 connector instead of 4BNC.

501-1532        cgsix color framebuffer P4
        See 501-1505.

501-1537        VX Visualization Accelerator/Super Frame Buffer VME
        Part of a two-board set tied together with the 501-1596
        frontplane connector. See 501-1538 (MVX) under Accelerators,
        below. Supported in the 4/330, 4/370, 4/390, 4/4xx.

        All locations are with component side up and VME connectors away
        from you.

        There are three switch blocks. In the far rightish, by switches
        S0101 and S0102, is the "Fcode PROM". Along the middle left edge
        is an 80MHz crystal. In the near rightish are four crystals,
        12.3MHz, 117MHz, 92.9MHz, and 135MHz. Along the rear edge, from
        left to right (top to bottom) are: the frontplane connector,
        a stereo out connector, a video output LED, a sync in connector,
        the 13W3 video connector, and a reset button.

        The video output is either 1152 x 900, 66Hz vertical refresh,
        61.8KHz horizontal sync, or 1280 x 1024, 67Hz vertical refresh,
        71.7KHz horizontal sync.

        S0101   Interrupt request (block in far edge right, switch 1 to
                 left, "Up" away)
          1     request bit 2                                   UP
          2     request bit 1                                   DOWN
          3     request bit 0                                   DOWN
          4     VMRQ                                            UP

        S0102   VME Address (block in far edge middle, switch 1 nearest)
          1     A31                                             ON
          2     A30                                             ON
          3     A29                                             OFF
          4     A28                                             OFF
          5     A27                                             ON
          6     A26                                             ON
          7     A25                                             ON
          8     unused

        S0301   VX Bus Address (block in middle right, switch 1 to left)
          1     unused
          2     unused
          3     A26                                             ON
          4     A27                                             ON
          5     A28                                             ON
          6     A29                                             ON
          7     A30                                             ON
          8     A31                                             ON

        Note that the MVX is always to the right of the VX. Also, when
        attaching the frontplane connector, tighten the four screws in
        the order: upper right, lower right, upper left, and lower left.
        Turn each screw no more than two turns at a time.

        Note that 4/3xx and 4/4xx CPUs require boot PROM version 4.1.1 or
        later when the VX is used as the system console. Also,
        EEPROM/NVRAM locations 0x1F and 0x60C-0x613 must be configured
        (see the EEPROM/NVRAM Parameters section).

        Note that at least SunOS 4.1.1 is required.

        Note that only frontplane connector 501-1596-02 should be used,
        not 501-1596-01.

        Power requirements are +5V @ 14A, -5V @ 1.45A.

501-1577        cgeight color framebuffer P4 3/80 backpanel
        As 501-1518, but with 3/80 backpanel.

        Power requirements are +5V @ 4.8A.

501-8029        3/E color framebuffer cgtwo 6U VME
        Appears as device cgtwo*.

        All locations are with component side up and VME connectors away
        from you.

        4BNC (blue, green, red, and sync, from left to right). Video
        output is 1152 x 900, 66Hz vertical refresh, 61.8KHz horizontal
        sync.

        J100    Base address (block in far left, pin 1 to left)
            By default, set for base address 0xFF400000.
          1-2   JUMPED
          3-4   UNJUMPED
          5-6   JUMPED
          7-8   UNJUMPED

        J700    Clock enable (single jumper in near middle)
          JUMP to enable clock.

        Note that SunOS 3.5 or later is required.

        Note that this board can be used with 3/E CPU 501-8028-07 or
        later.

        Power requirements are +5V @ 4A.


    ACCELERATORS

501-1055        GP graphics processor VME
        Graphics accelerator. Originally designed for the 2/130 and
        2/160, also supported in the 3/160, 3/180, 3/2xx, 3/4xx, 4/150,
        4/2xx, and 4/3xx. Appears as device gpone0a-d. Used with the
        501-1014 cgtwo or 501-1267 cgfive video boards and optionally
        the 501-1058 GB graphics buffer.

        All locations are with component side up and VME connectors away
        from you.

        There is a set of LEDs in the near left (upper) corner.

        There are a variety of jumpers and DIP switches:

        J1-J8   GP board ID (block in middle left edge, J1 nearest)
          J1    ID bit 3                                        UNJUMPED
          J2    ID bit 4                                        JUMPED
          J3    ID bit 2                                        JUMPED
          J4    ID bit 5                                        UNJUMPED
          J5    ID bit 1                                        UNJUMPED
          J6    ID bit 6                                        UNJUMPED
          J7    ID bit 0. Jumped if GB graphics buffer is present,
                unjumped otherwise.
          J8    ID bit 7                                        UNJUMPED

        J9      GND test point (single jumper in far left corner)
          Hardwired.

        J10     GND test point (single jumper in near left corner)
          Hardwired.

        J11     PP halt test point (single jumper in far left)
          Hardwired.

        J12     VP halt test point (single jumper in far left)
          Hardwired.

        J13     Manual reset test point (single jumper in far left)
          Hardwired.

        J14     Main clock connect (single jumper in far left)  JUMPED

        J15     VP free-running CLK test point (single jumper   UNJUMPED
                in middle farish leftish)

        J16     PP free-running CLK test point (single jumper   UNJUMPED
                in middle farish leftish)

        J17     GND test point (single jumper in far right)
          Hardwired.

        J18     GND test point (single jumper in near right)    UNJUMPED

        SW      (block in left far edge, SW1 nearest)
           Turn switch off to match a 1-bit, on to match a 0-bit.
           Set for default address of 0x210000:
          SW1   VME address bit 17                              ON
          SW2   VME address bit 16                              OFF
          SW3   VME address bit 23                              ON
          SW4   VME address bit 22                              ON
          SW5   VME address bit 21                              OFF
          SW6   VME address bit 20                              ON
          SW7   VME address bit 19                              ON
          SW8   VME address bit 18                              ON

        Note that the 2/160 power supply requires RC network
        540-1300-01.

        Power requirements are +5V @ 16.4A.

501-1139        GP+ graphics processor VME
        Graphics accelerator. Originally designed for the 2/130 and
        2/160, also supported in the 3/160, 3/180, 3/2xx, 3/4xx, 4/150,
        4/2xx, and 4/3xx. Appears as device gpone0a-d. Used with the
        501-1014 cgtwo or 501-1267 cgfive video boards and optionally
        the 501-1058 GB graphics buffer.

        All locations are with component side up and VME connectors away
        from you.

        There is a set of LEDs in the near left (upper) corner.

        There are a variety of jumpers and DIP switches:

        J1-J8   GP board ID (block in middle left edge, J1 nearest)
          J1    ID bit 3                                        UNJUMPED
          J2    ID bit 4                                        JUMPED
          J3    ID bit 2                                        JUMPED
          J4    ID bit 5                                        UNJUMPED
          J5    ID bit 1                                        UNJUMPED
          J6    ID bit 6                                        UNJUMPED
          J7    ID bit 0. Jumped if GB graphics buffer is present,
                unjumped otherwise.
          J8    ID bit 7                                        UNJUMPED

        J9      GND test point (single jumper in far left corner)
          Hardwired.

        J10     GND test point (single jumper in near left corner)
          Hardwired.

        J11     PP halt test point (single jumper in far left)
          Hardwired.

        J12     VP halt test point (single jumper in far left)
          Hardwired.

        J13     Manual reset test point (single jumper in far left)
          Hardwired.

        J14     Main clock connect (single jumper in far left)  JUMPED

        J15     VP free-running CLK test point (single jumper   UNJUMPED
                in middle farish leftish)

        J16     PP free-running CLK test point (single jumper   UNJUMPED
                in middle farish leftish)

        J17     GND test point (single jumper in far right)
          Hardwired.

        J18     GND test point (single jumper in near right)    UNJUMPED

        SW      (block in left far edge, SW1 nearest)
           Turn switch off to match a 1-bit, on to match a 0-bit.
           Set for default address of 0x210000:
          SW1   VME address bit 17                              ON
          SW2   VME address bit 16                              OFF
          SW3   VME address bit 23                              ON
          SW4   VME address bit 22                              ON
          SW5   VME address bit 21                              OFF
          SW6   VME address bit 20                              ON
          SW7   VME address bit 19                              ON
          SW8   VME address bit 18                              ON

        Note that the 2/160 power supply requires RC network
        540-1300-01.

        Power requirements are +5V @ 14.6A.

501-1268        GP2 graphics processor VME
        Graphics accelerator. Supported in the 3/150, 3/160, 3/180,
        3/2xx, 3/4xx, 4/150, 4/2xx, 4/3xx, and 4/4xx. Appears as device
        gpone0a-d. Used with the 501-1267 cgfive or 501-1434 cgnine video
        boards. Not compatible with the 501-1058 GB graphics buffer.

        All locations are with component side up and VME connectors away
        from you.

        There is one switch block:

        SW      (switch block in far edge left @ K3 (U1601), switch 1 to
                 left)
          1     A18 address decode                                      OFF
          2     A19 address decode                                      ON
          3     A20 address decode                                      ON
          4     A21 address decode                                      OFF
          5     A22 address decode                                      ON
          6     A23 address decode                                      ON
          7     unused                                                  ON
          8     unused                                                  ON

        Note that additional software is required for SunOS 3.x (first
        available for SunOS 3.5 for Sun-3's and 3.2 for Sun-4's).
        Support is built into SunOS 4.x and later.

        Note that this board must be 501-1268-07 or later to use with
        the 501-1434 cgnine framebuffer.

        Power requirements are +5V @ 21.1A.

501-1383        TAAC-1 application accelerator, POP board VME
        One board of a two-board set, see 501-1447.

        All locations are with component side up and VME connectors away
        from you.

        From left to right (top to bottom) on the rear edge are: a reset
        switch, 4BNC video in (sync, red, green, blue), and 4BNC video
        out (sync, red, green, blue).

501-1447        TAAC-1 application accelerator, DFB board VME
        One board of a two-board set, see also 501-1383. Supported in
        the 3/160, 3/180, 3/2xx, 3/4xx, 4/150, 4/2xx, 4/360-4/390, and
        4/4xx. Appears as device taac0. It is somewhere between a general
        applications accelerator and a graphics accelerator, being a
        very-long-instruction-word computation engine with video I/O. It
        requires a bunch of special software, including its own separate C
        compiler and libraries.

        All locations are with component side up and VME connectors away
        from you.

        Toward the left side (top) of the rear edge is a reset switch.

        There are five jumper blocks and (on some versions) one switch
        block.

        JB231   (block, four rows by thirteen columns, in far left, row
                 A nearest, column 1 at left)
          1     B-C JUMPED
          2-7   hardwired on board revisions without switch A26, empty
                 on board revisions with switch A26.
          8     BGIN, C JUMPED to 9B
          9     empty (but see 8 above)
          10    VMBG IN/OUT 0, B-C jumped
          11    VMBG IN/OUT 1, B-C jumped
          12    VMBG IN/OUT 2, B-C jumped
                enable 50MHz clock, D jumped to 13D
          13    VMBG IN/OUT 3, B-C jumped
                see also 12 above

        JB201-JB204     (blocks, two rows by two columns, in near left,
                 JB201 nearest, row B nearest)
          Hardwired for 16K x 4K RAM:
                JB201 A right, JB201 A left, JB202 B left, JB202 A left
                JB203 B right, JB203B left, JB203A left
                JB204 B right, JB204 A left

        Switch A26      VME address (switch block in far left, switch 1
                 to left)
            Set to base address 0x28000000 by default. 4/150 needs base
            address 0xF8000000. Set switch OFF to match a 1-bit, ON to
            match a 0-bit.
          1     A25                                     ON
          2     A26                                     ON
          3     A27                                     OFF
          4     A28                                     ON (4/150 OFF)
          5     A29                                     OFF
          6     A30                                     ON (4/150 OFF)
          7     A31                                     ON (4/150 OFF)
          8     unused?

        Note that the TAAC-1 is not compatible with the 501-1014 cgtwo
        or the 501-1434 cgnine.

        Note that the TAAC-1 is not supported under Solaris 2.x.

        Power requirements (for the two-board set?) are +5V @ 23.9A, -5V
        @ 0.4A, +12V @ 0.2A.

501-1538        MVX Visualization Accelerator/Pixel Processor
        Part of a two-board set tied together with the 501-1596
        frontplane connector. See 501-1537 (VX) under Color Framebuffers
        above. Supported in the 4/330, 4/370, 4/390, 4/4xx.

        All locations are with component side up and VME connectors away
        from you.

        Along the rear edge, from left to right (top to bottom) are the
        frontplane connector and four LEDs. The LEDs are not used.

        J0101   Clock (single jumper in far middle)
          JUMP to enable 80MHz clock.

        J0901   Bus request (block in far left, pin 1 to left)
          1-2   unused?
          3-4   VME bus request 1                               JUMPED
          5-6   VME bus request 2                               UNJUMPED
          7-8   VME bus request 3                               JUMPED

        J0902   Bus grant (block in far left corner, three rows by four
                 columns, pin 1 in far right, pin 4 in far left, pin 9
                 in near right, pin 12 in near left)
          1-2   BG2 OUT - BG2 IN                                JUMPED
          3-4   BG1 OUT - BG1 IN                                JUMPED
          5-9   BGx OUT - BG3 OUT                               JUMPED
          6-10  BGx IN - BG3 IN                                 JUMPED
          7     BGx OUT
          8     BGx IN
          11-12 BG0 OUT - BG0 IN                                JUMPED

        J1001   Bus control/arbitration (single row in near left corner,
                 pin 1 to right)
          1-2   VCC - CTRL                                      JUMPED
          3     GND
          4     VCC
          5-6   GND - MODE                                      JUMPED

        S1303   Base Address (switch block in near right corner, switch
                 1 to left, "Up" away)
          1     A31                                             DOWN
          2     A30                                             DOWN
          3     A29                                             UP
          4     A28                                             UP
          5     A27                                             DOWN
          6     A26                                             UP
          7     A25                                             DOWN
          8     unused

        Note that the MVX is always to the right of the VX. Also, when
        attaching the frontplane connector, tighten the four screws in
        the order: upper right, lower right, upper left, and lower left.
        Turn each screw no more than two turns at a time.

        Note that at least SunOS 4.1.1 is required.

        Note that only frontplane connector 501-1596-02 should be used,
        not 501-1596-01.


    SCSI controller boards
    ----------------------

501-1006        Sun-2 SCSI/serial Multibus
        SCSI interface and four serial lines with full modem control.
        Identifiable by its three 50-pin header connectors, one of which
        (J3, the bottommost) is the SCSI interface and the other two of
        which (J1 and J2) are the serial lines.

        There are three DIP switches: U305, U312, and U315. Holding the
        board with the 50-pin header connectors down and component side
        toward you, U312 is lowest, U315 in the middle, and U305 at the
        top. All three are eight-position.

        U305    SCSI board base address/bus priority in (BPRN)
          Switches one through six correspond to address bits A14
          through A19 respectively. The default setting is switch six
          on, switches one through five off. Switch eight grounds the
          bus priority in (BPRN) line and must be OFF; it should be ON
          only if you are configuring the board as the highest-priority
          DMA master in a serial card cage (i.e. a non-Sun
          configuration).

        U312    SCSI interrupt priority
          Switches eight through one correspond to interrupt priorities
          0 through 7 in that (reverse) order. The default is for switch
          six to be ON and all others OFF, which yields an interrupt
          priority of 2.

        U315    Serial interrupt priority
          Switches eight through one correspond to interrupt priorities
          0 through 7 in that (reverse) order. The default is for switch
          two to be ON and all others OFF, which yields an interrupt
          priority of 6.

        Serial ports C and D appear on connector J2, E and F on
        connector J1. These are usually labelled SIO-S0 through SIO-S3
        on the back of the machine (SIO-C through SIO-F on older
        machines) and appear as /dev/ttys0 through /dev/ttys3 under
        SunOS. If you have a second SCSI/serial board, the serial ports
        appear as /dev/ttyt0 through /dev/ttyt3 under SunOS. The
        documented maximum output speed is 19200 bps. All ports are
        wired DTE and are compatible with both RS-232C and RS-423, using
        Zilog Z8530A dual UART chips. The pinout of J2 is:

           3    TxD-C       14  DTR-C       33  DD-D
           4    DB-C        15  DCD-C       34  CTS-D
           5    RxD-C       22  DA-C        36  DSR-D
           7    RTS-C       24  BSY-C       38  GND-D
           8    DD-C        28  TxD-D       39  DTR-D
           9    CTS-C       29  DB-D        40  DCD-D
           11   DSR-C       30  RxD-D       47  DA-D
           13   GND-C       32  RTS-D       49  BSY-D

        The pinout of J1 is exactly similar; substitute "E" for "C" and
        "F" for "D".

        Power requirements are +5V @ 5A.

501-1045        "Sun-2" SCSI host adapter, 6U VME
        Used with various 6U/9U VME adapters to produce the 501-1138,
        501-1149, and 501-1167. Uses PALs and logic sequencers to
        implement SCSI protocols. Frequently found in Sun-3's despite
        name.

        There are DIP switches at U702 and U704. The bits are inverted,
        so the default settings correspond to an address of 0x200000.

        U702    VMEbus address, low bits
          1-4   not connected
          5-8   A12-A15                 ON by default

        U704    VMEbus address, high bits
          1-5   A16-A20                 ON by default
          6     A21                     OFF by default
          7-8   A22-A23                 ON by default

501-1138        "Sun-2" SCSI host adapter, external, VME
        A 501-1045 6U VME SCSI host adapter in a 270-1138 6U/9U VME
        adapter, which provides only an external D50 connection. See
        501-1045. See 3/50 motherboard listing for pinout.

501-1149        "Sun-2" SCSI host adapter, internal, VME
        A 501-1045 6U VME SCSI host adapter in a 270-1059 6U/9U VME
        adapter, which provides only an internal connection to VME slot
        7 in 12-slot chassis. See 501-1045.

501-1167        "Sun-2" SCSI host adapter, external/internal, VME
        A 501-1045 6U VME SCSI host adapter in a 270-1059 6U/9U VME
        adapter, which provides only an internal connection to VME slot
        7 in 12-slot chassis, but also with a 530-1282 cable/connector
        to provide an external D50 connection as well. See 501-1045. In
        order to use both sides of the bus, it is generally necessary to
        remove the SCSI terminators from the 501-1045 board. See 3/50
        motherboard listing for external pinout. Has a holder for a
        coin battery which drives a clock chip that Suns don't use (see
        Misc Q&A #6).

501-1170        "Sun-3" SCSI host adapter, internal, VME
        A 501-1236 6U VME SCSI host adapter in a 270-1059 6U/9U VME
        adapter, which provides only an internal connection to VME slot
        7 in 12-slot chassis.

501-1217        "Sun-3" SCSI host adapter, external, VME
        A 501-1236 6U VME SCSI host adapter in a 270-1138 6U/9U VME
        adapter, which provides only an external D50 connection. See
        501-1236. See 3/50 motherboard listing for pinout.

501-1236        "Sun-3" SCSI host adapter, 6U VME
        Used with various 6U/9U VME adapters to produce the 501-1170 and
        501-1217. Can also be used with a 270-1059 6U/9U VME adapter (as
        in the 501-1170) paired with a 530-1282 cable/connector to
        provide an external D50 connection as well (generally requires
        removing the SCSI terminators from the 501-1236 to use both
        sides of the bus); this configuration was never supported by
        Sun, so it doesn't have a part number, but is supposed to work.
        Uses an NCR5380 SCSI chip.

        There are DIP switches at U408 and U409.

        SW1     VMEbus address
            At U409.
          1-2                           ON by default
          3                             OFF by default
          4-8                           ON by default

        SW2     VMEbus address
            At U408.
          1                             ON by default
          2     ON for first host adapter, OFF for second
          3-5                           ON by default
          6-8   not connected


    Non-SCSI disk controller boards
    -------------------------------

SMD

370-1012        Xylogics 450 SMD controller Multibus
        This board is used to control SMD hard disks. It is a Multibus
        bus master using variable-burst-length DMA.

        This board should not share a Multibus P2 section with Sun-2 CPU
        or memory boards because it has P2 traces which are incompatible
        with those used on the Sun-2 CPU and memory boards.

        Since this board is a Multibus bus master, its relative slot
        number determines its priority (slot 1 is the highest). The
        board must be placed in a lower-priority position than the Sun-2
        CPU board for proper handling of bus arbitration. It should also
        be placed in a lower-priority position than the 370-0502 (?)
        TAPEMASTER half-inch tape controller board, if there is one in
        the system, but it may be placed in a higher-priority position
        than the 501-1006 SCSI/serial board.

        This board dissipates a fair amount of heat and should be placed
        in the most central position possible, subject to the
        considerations listed above. For maximum air circulation, leave
        the slot to the left of this board empty, if possible.

        The edge of the board has one 60-pin header connector for SMD
        control and four 26-pin header connectors for SMD data; however,
        only two SMD disks are supported per board by SunOS. There is no
        required order of connection from SMD disks to SMD data
        connectors; the board automatically detects which disk is
        connected to which data connector.

        At one corner of the SMD-connector-edge of the board is a small
        LED, which flickers during disk activity.

        This board has dozens of jumper blocks, some of which are
        cross-jumped to other jumper blocks.

        JA-JB   crossjumped always from one to the other
                 Located at K3.
          1-1   8/16-bit address control                UNJUMPED by default
          2-2   address bit 16                          UNJUMPED by default
          3-3   address bit 8                           JUMPED by default
          4-4   address bit 15                          UNJUMPED by default
          5-5   address bit 9                           UNJUMPED by default
          6-6   address bit 14                          UNJUMPED by default
          7-7   address bit 10                          UNJUMPED by default
          8-8   address bit 12                          JUMPED by default
          9-9   address bit 11                          UNJUMPED by default
                 These address bits are inverted; the pattern above
                 (0x11) actually yields address 0xEE??.
          10-10 ground                                  UNJUMPED by default

        JE
                 Located at K4, more or less.
          1-2   parallel DMA arbiter/BPRO               JUMPED by default
          3     isolate parallel DMA                    -
          4-5   address bit 7                           JUMPED by default
                 This address bit is also inverted.

        JF
          1-JH1 bus activity LED                        CROSSJUMPED by default
                 Does not appear on my Rev. M board, JH1 is wired
                 directly to pin 1 on E6 (a 74LS273) instead.

        JH
                 Located at N10, right by P2 bus connector.
          1                                     CROSSJUMPED to JF1 by default
                 See JF1.
          2     power fail protection                   -
          3-4   inhibits DMA sequencer CLK              UNJUMPED by default
          5-6   selects DMA sequencer CLK               JUMPED by default

        JJ
                 Located at J12.
          1-2   inhibit disk sequencer CLK              JUMPED by default
          3-4                                           UNJUMPED by default

        JK
                 Located at N11.
          Eight-pin jumper block, all unjumped by default.
                 On my Rev. M board, pins 1-2, 3-4, and 5-6 are
                 jumped.

        JM
                 Located at N13, very lower right corner by P2 bus
                 connector.
          1-2   16-24 bit mode                          UNJUMPED by default
          3-4   16-20 bit mode                          JUMPED by default
          5-6
                 Not listed in docs, appear on my Rev. M board,
                 unjumped.

        JN
                 Can't find on my Rev. M board.
          1-2                                           UNJUMPED by default

        JT
                 Located at K1-K2ish.
          1-2   optional 8K                             JUMPED by default
          3                                             -

        JV
                 Located at B3.
          1-2   optional 8K                             JUMPED by default
          3                                             -

        JX      interrupt request level
                 Located at N4.
          1-2                                           UNJUMPED by default
          3                                             -
          4-E2  interrupt level 2                       JUMPED by default
                  NOTE that this is NOT jumper pin JE2 but rather
                  another pin labeled just "E2".
          5-6                                           UNJUMPED by default
          7-8                                           UNJUMPED by default

        JY
                 Located at G9ish.
          1-2   close ECC feedback                      JUMPED by default
          3                                             -

        JZ      crystal shunt
                 Located in upper right corner by thumblever.
          Jumped by default.

        For the first XY450 board, jump JC1-JR1, JC2-JD2, JC3-JD3, and
        JC4-JD4. For the second XY450 board (only two are supported by
        SunOS), jump JC1-JR1, JC2-JD2, JC3-JD3, and JC4-JR4. Pins one
        through four of JC correspond to address bits six through three
        in that (reverse) order. Jumping JC to JR selects the bit;
        jumping JC to JD deselects the bit. Hence, the address of the
        first board is 0xEE40 and the second 0xEE48. These jumper blocks
        are located at K4, right by the JE block.

        Power requirements are +5V @ 8A and -5V @ 1A.
        
IPI

501-1539
501-1855        ISP-80 IPI controller VME
        This board allows connection of IPI drives (q.v. for information
        on IPI in general) to a VME-based machine. It has an onboard
        68020 and RAM for handling I/O optimization and buffering. It
        has a maximum DMA tranfer rate of 16M per second, but the IPI
        maximum disk tranfer rate is only 6M.

        Note that older firmware revisions may have problems with newer
        disks.

        Note that the 501-1539 can be used with cgfive boards
        501-1267-05 or later only.

SCSI ADAPTORS

370-1010	Adaptec ACB4000 SCSI-MFM controller
        This board allows an MFM hard disk with a standard ST-506
        interface to be connected to a SCSI bus. The Adaptec ACB4070A
        SCSI-RLL controller is almost identical.

        This board supports up to two MFM drives, which appear as SCSI
        LUNs 0 and 1 within the SCSI ID for the board as a whole.

        Connection information:

        J0      20-pin                  MFM data connector for drive 0

        J1      20-pin                  MFM data connector for drive 1

        J2      34-pin                  disk control connector

        J3                              power

        J4      50-pin                  SCSI connector

        Jumper information:

        JS,JR,JT,JPU
          R-S   select precomp at cylinder 400          UNJUMPED by default
          R-T   select precomp on all cylinders         UNJUMPED by default
          R-PU  deselects precomp on all cylinders      JUMPED by default

        J5
	  A-B	SCSI id MSB
	  C-D	SCSI id
	  E-F	SCSI id LSB
                  Pins A-F are used to set the SCSI bus address. Jumping
                  a pair of pins turns that bit on; unjumping them turns
                  that bit off. The default SCSI bus address is 0, all
                  pins unjumped.
          G-H   DMA transfer rate                       UNJUMPED by default
                  SYSCLOCK/4 when jumped, DATACLOCK/2 when unjumped.
          I-J   Extended commands enable/disable        UNJUMPED by default
          K-L   not used                                UNJUMPED by default
          M-N   selects a seek complete status          UNJUMPED by default
                  Also described as "Support Syquest 312/DMA 360".
          O-P   Self-diag                               UNJUMPED by default

        SCSI terminator packs at RP3 and RP4, sometimes (usually?)
        soldered in.

        Error Codes (number of half-second bursts):

            None            8085
            1               8156 RAM
            2               Firmware
            3               AIC-010 logic
            4               AIC-010 logic
            5               AIC-300 logic
            6               AIC-010 BUS

	Power requirements are +5V @ 2A (1.5A?) and +12V @ 0.5A (0.3A?).

xxx-xxxx        Emulex MD21 SCSI-ESDI controller
        This board allows an ESDI disk to be connected to a SCSI bus.
        The MD21 can actually control two ESDI disks, which appear as
        SCSI logical units (LUNs) 0 and 1 on the SCSI ID assigned to the
        MD21 as a whole.

        The MD21 uses a 8031 CPU with 32K PROM. It has 32K of onboard
        buffer RAM, with about 14K being used for each connected disk.
        It supports ESDI transfer rates up to 15Mbps and SCSI transfer
        rates up to 1.25Mbps (burst). It supports the SCSI
        connect/disconnect option and SCSI bus parity. Manufacturer's
        rated Mean Time Between Failures is 42,425 hours.

        This board has one eight-position DIP switch and seven
        connectors.

        SW1
          1-3   SCSI bus ID, LSB (SW1-1) to MSB (SW1-3)
          4     not used
          5     physical sector size
                  ON    256 bytes
                  OFF   512 bytes
          6     automatic drive spinup
                  ON    drives not spun up automatically
                  OFF   drives spun up automatically
          7     soft error reporting
                  ON    errors not reported
                  OFF   errors reported
          8     SCSI bus parity
                  ON    enabled
                  OFF   disabled

        J1      ESDI control (daisy-chained to both disks)
                  maximum cable length 10 feet

        J2      ESDI data for drive 1
                  maximum cable length 10 feet

        J3      ESDI data for drive 0
                  maximum cable length 10 feet

        J4      user panel connector

        J5      testing

        J6      SCSI bus

        J7      power

        This board can be configured to provide power to an external
        terminator by installing a 1N5817 diode at board location CR2
        and connecting wire wrap jumper E to F. This will provide
        termination power on SCSI bus pin 26. WARNING: this can cause
        shorts!

        This board has two status LEDs, one red and one green.

                RED     GREEN
                ---     -----
                OFF     OFF     hardware reset test
                OFF     ON      8031 test
                                PROM checksum test
                                buffer controller test
                                dynamic RAM test
                ON      OFF     disk formatter test
                                SCSI controller test
                ON      ON      self-test passed, ready to run

        During normal operations, the green LED seems to blink steadily.

        Power requirements are +5V @ 1.5A.

MISC

370-1401        Prestoserve NFS accelertor SBus
        Nonvolatile RAM and logic used to cache NFS writes (which are
        otherwise synchronous and hence slow).

        With component side up and SBus connector away from you, there
        are two batteries, each with a fuse, and a switch block toward
        the near side. The batteries are not field-replaceable. On the
        back edge is an LED and a "Live Test Switch". When this button
        is pressed, the LED lights up if there is cached data in the
        onboard nonvolatile memory.

        SW1 (in near midle)
          BAT   enables battery backup. The Prestoserve software will
                 not initialize and NFS writes will not be cached unless
                 SW1 is in this position.
          5V    disables battery backup. Cached data will be lost if the
                 switch is set to 5V for more than five minutes. Use
                 this setting to conserve battery power when the board
                 is not installed and whatever data is currently present
                 does not need to be preserved.

        Note that at least SunOS 4.1.1 with Prestoserve 2.3 software is
        required. Solaris 2.x requires Prestoserve 2.4. The Sun 4/6xx
        systems require at least Solaris 1.0.1 (SunOS 4.1.2), and only
        support one Prestoserve controller (either VME or SBus) in the
        system. The SBus Prestoserve accelerates NFS writes to disks
        connected to either SBus or VME disk controllers.

        The SPARCstation 10 supports an onboard NVSIMM or the SBus
        Prestoserve controller.

        Power requirements are +5V @ 0.8A.

501-1847        Prestoserve NFS accelerator VME
        Nonvolatile RAM and logic used to cache NFS writes (which are
        otherwise synchronous and hence slow).

        With component side up and VME connectors away from you, there
        are three switch blocks toward the far edge and a jumper in the
        far middle. Toward the near edge are three batteries, each with
        a fuse, and a switch block. The batteries are not
        field-replaceable. On the back edge is an LED and a "Live Test
        Switch". When this button is pressed, the LED lights up if there
        is cached data in the onboard nonvolatile memory.

        SW1 (in far right, switch 1 to right)
          1     ON for 24-bit VME operation (default), OFF for 32-bit VME
                 operation.
          2-9   Address bits A24-A31. All OFF by default.

        SW2 (in far middle, switch 1 to right)
          1-8   starting address bits A16-A23. OFF to match a one bit,
                 ON to match a zero bit.

        SW3 (in far left, switch 1 to right)
          1-8   ending address bits A16-A23. OFF to match a one bit, ON
                 to match a zero bit.

        SW4 (in near leftish)
          BAT   enables battery backup. The Prestoserve software will
                 not initialize and NFS writes will not be cached unless
                 SW4 is in this position.
          5V    disables battery backup. Cached data will be lost if the
                 switch is set to 5V for more than five minutes. Use
                 this setting to conserve battery power when the board
                 is not installed and whatever data is currently present
                 does not need to be preserved.

        R4 (jumper in far middle)
          UNJUMPED

        The normal address range for the Prestoserve board is
        0x800000-0x8FFFFF (SW2-1 OFF, rest of SW2 ON, SW3-1,5,6,7,8 OFF,
        rest of SW3 ON). The alternate range is 0xC00000-0xCFFFFF (as
        above but SW2-2 and SW3-2 OFF). This alternate address range is
        used if the Network CoProcessor software release 1.4 is
        installed and a fifth NC400 (370-1396, 370-1421, 370-1696?) is
        installed. This restriction does not apply to Network
        CoProcessor release 1.4.2.

        Note that at least SunOS 4.1 PSR A (with Prestoserve 2.0
        software) is required. SunOS 4.1.1-4.1.3 require Prestoserve 2.3
        software. It is not clear whether Solaris 2.0 or 2.1 support the
        VME Prestoserve, but 2.2 and later don't. The Sun 4/6xx systems
        require at least Solaris 1.0.1 (SunOS 4.1.2), and only support
        one Prestoserve controller (either VME or SBus) in the system.
        Furthermore, the VME Prestoserve only accelerates NFS writes to
        disks connected to VME disk controllers.

        When used with the ISP-80 IPI disk controller (501-1539 or
        501-1855), the ISP-80 firmware must be at least 525-1023-05,
        525-1024-08, and 525-1025-08. Lower revisions may cause SunDiag
        to hang when the system has 32M of memory. Systems with more
        than 32M are not affected. The 501-1539-08, 501-1855-02, and
        later ISP-80 boards have the minimum required firmware.

        Power requirements are +5V @ 2.1A.


    Non-SCSI tape controller boards
    -------------------------------

HALF-INCH NINE-TRACK

370-0502 ?      Computer Products Corporation TAPEMASTER
        This part number is listed as either the TAPEMASTER or the
        Xylogics 472 tape controller in different places. The TAPEMASTER
        is also listed as 370-0167.

        This board should not share a Multibus P2 section with Sun-2 CPU
        or memory boards.

        This board is a Multibus bus master, so its relative slot
        number determines its priority (slot 1 is the highest). The
        board must be placed in a lower-priority position than the Sun-2
        CPU board for proper handling of bus arbitration. It should also
        be placed in a higher-priority position than the 370-1012
        Xylogics 450 SMD controller board, if there is one in the
        system.

        DIP switch and jumper information:

        S1      addressing
          Eight-position DIP switch, selecting address bits A1 through
          A7 and 8/16-bit addressing. The first TAPEMASTER board should
          have switches 1 and 3 OFF and all others ON. The second
          TAPEMASTER board should have switches 1, 3, and 7 OFF and all
          others ON.

        S2      addressing
          Eight-position DIP switch, selecting address bits A8 through
          A15. All switches should be ON.

        jumper pins (defaults in uppercase):
          1-2   UNJUMPED for Sun-2 backplanes, jumped for serial
                backplane (Sun-1/100U)

          3-4   JUMPED if the CPU is set up to support CBRQ, unjumped if
                not

          3-5   jumped if the CPU is not set up to support CBRQ,
                UNJUMPED if it is

                        JUMPED BY DEFAULT
          INT-3         28-29           35-39           43-49           48-49
          15-16         31-39           36-40           44-49           42-50
          18-19         32-39           37-39           45-49           51-52
          20-21         33-39           38-39           46-49           54-55
          25-26         34-39           41-49           47-49           57-58

                        UNJUMPED BY DEFAULT
          22      27      30      53      56      59-60

        Power requirements are +5V @ 4A.


SCSI ADAPTORS

370-1011        Sysgen SC4000 SCSI/QIC-II controller
        This board is used to connect a QIC-II (aka QIC-02) quarter-inch
        cartridge tape drive to the SCSI bus. The board supports only
        one attached tape drive, usually a QIC-11 (20M) drive. It was
        standard equipment on the 2/120.

        There are two LEDs (DS1 and DS2) in one corner of the board. DS2
        is on when the board is selected (during SCSI activity).

        Connection information:

        JH      50-pin                  SCSI connector

        JT      50-pin                  tape connector, labelled "TAPE"

        Note that there is a 50-pin SCSI connector labelled "SLAVE" on
        the board as well. The Sysgen manual recommends connecting
        downstream SCSI devices to this connector instead of using an
        inline connector on JH; Sun recommends against this, because
        doing so will result in loss of access to all downstream devices
        if the Sysgen board fails.

        DIP switch and jumper information:

        four-position DIP switch        SCSI address
          Switches one, two, and three correspond to SCSI address bits
          one, two, and three respectively. The default is SCSI address
          4: switches one and two OFF, switch three ON. Switch four
          should always be OFF.

        PK6     DIP sockets             SCSI termination
        PK7
          220/330-ohm terminator packs

        W1      jumper
          Eight pins, all unjumped by default.

        Power requirements are +5V @ 2A.

xxx-xxxx        Emulex MT-02 SCSI/QIC-02?(-36?) controller
        This board is used to connect a quarter-inch cartridge tape
        drive to the SCSI bus. It is the standard method of connecting a
        QIC-24 (60M) drive to a Sun-3. Despite the name, the board is
        reputed to actually attach QIC-36 (not QIC-02) devices to the
        SCSI bus. So far I haven't found any documents which actually
        say one way or the other.

        With the component side of the board up and the power connector
        J4 in the upper right corner, the tape data connector J3 is on
        the left side, the SCSI connector J5 is on the right side, and
        the eight-position DIP switch SW1 is in the upper left corner.

        SW1     eight-position DIP switch
         SW1-1  SCSI id LSB
         SW1-2  SCSI id
         SW1-3  SCSI id MSB
         SW1-4  unused                  OFF by default
         SW1-5  drive select 0          see table below
         SW1-6  drive select 1
         SW1-7  drive select 2          documented as OFF by default
         SW1-8  SCSI bus parity         OFF by default
                  ON    enable
                  OFF   disable

        There are two jumpers, A-B and E-F.

        A-B     EPROM memory size select        JUMPED by default
          In the upper-leftish center.

        E-F     JUMPED for Archive Scorpion
                UNJUMPED for Wangtek 5000E
          Just inboard from the center of the tape data connector J3.

        SCSI terminator packs are at U5 and U46. U5 is in the upper
        right corner; U45 is in the lower right corner.

        Drive type settings are:

                SW1-7  SW1-6  SW1-5      Drive

                  0      0      0        Cipher QIC-36
                  0      0      1       *Archive Scorpion
                  0      1      0        Wangtek series 5000 basic
                  0      1      1       *Wangtek series 5000E
                  1      0      0        Kennedy 6500
                  1      0      1        ???
                  1      1      0        ???
                  1      1      1        ???

           *Documented by Sun.


    Ethernet and other network boards
    ---------------------------------

501-0288        3COM 3C400 Ethernet Multibus
        This board is used in Sun-1 and Sun-2 configurations. It may be
        distinguished from the 501-1004 Sun-2 Multibus Ethernet by
        checking the location of the Ethernet cable connector, which is
        toward the bottom of the board. (On the edge with the Multibus
        connectors, the larger connector is toward the top.)

        DIP switch and jumper information:

        JP1     jumper          Addressing size
        JP2     jumper
          With the board component-side up and the Multibus edge
          connectors facing you, these jumpers are in the lower left
          corner of the board. They should be set for 20-bit memory
          addressing, with JP1 unjumped and JP2 jumped.

        MRDC    jumper
        MWTC    jumper
        IORC    jumper
        IOWC    jumper
          To the right of JP1 and JP2. MRDC and MWTC should be jumped.
          IORC and IOWC should be unjumped.

        INT?    jumper          Ethernet interrupt level
          Eight-position jumper, with pairs marked INT0 through INT7.
          INT3 should be jumped, all others unjumped.

        ADR17   DIP switch
          In the bottom right corner of the board. All switches should
          be set to OFF.

        ADR13   DIP switch
          Eight-position DIP switch; switches seven through one
          correspond to address bits A13 through A19 in that (reverse)
          order. For the first Ethernet board, switches one, two, and
          three should be ON and all others OFF. For the second Ethernet
          board, switches one, two, three, and seven should be ON and
          all others OFF. Switch eight should ALWAYS be OFF.

        The Ethernet address PROM is in component position I2.

        Power requirements are +5V @ 5V and +12V @ 0.5A.

501-1004        Sun-2 Ethernet Multibus
        This board may be distinguished from the 501-0288 3COM Multibus
        Ethernet by checking the location of the Ethernet cable
        connector, which is toward the top of the board (toward the same
        short edge as the larger Multibus connector). The connector is a
        header connector; electrically, it is AUI Ethernet.

        Intel 82586 Ethernet controller chip, 256K of dual-ported
        memory.

        DIP switch and jumper information:

        U503    DIP switch      Register base address
          Eight-position DIP switch; switches one through eight
          correspond to address bits A12 through A19, respectively. For
          the first Ethernet board, switches four and eight should be ON
          and all others OFF. For the second Ethernet board, switches
          three, four, and eight should be ON and all others OFF.

        U505    DIP switch      On-board memory base address
          Eight-position DIP switch; switches one through four
          correspond to address bits A16 through A19, respectively. For
          the first Ethernet board, switch three should be ON and all
          others OFF. For the second Ethernet board, switches two and
          four should be ON and all others OFF.

        U506    DIP switch      Size of Multibus port into onboard memory
          Eight-position DIP switch. For the first Ethernet board,
          switches two, three, six, and seven should be ON and all
          others OFF. For the second Ethernet board, switches one, four,
          five, and eight should be ON and all others OFF.

        J101    jumper          Transceiver type
          For type 1 (capacitive-coupled) transceivers, jumped. For type
          2 (transformer-coupled) transceivers, unjumped. On my Rev. 12A
          board, just a pair of solder pads, no wire -- permanently
          unjumped.

        J400    jumper          M.BIG
          "J400 allows the selection of M.BIG, or the input to Port B
          (bank select circuitry) which has the address lines for 256K
          DRAMs." Unjumped by default.

        J401    jumper          M.EXP
          Multibus P2 address and data buffers enabled when jumped,
          disabled when unjumped. If enabled, this board MUST have its
          own private P2 section. ONLY boards which do not use the P2
          bus at all may be one the same section. If disabled, this
          board may be on the same P2 section as the CPU and memory
          boards, or it may be on a P2 section used by other boards with
          these notes: this board grounds pins P2-26, P2-32, P2-38, and
          P2-50, and cannot tolerate voltages outside the range of 0-5V
          on any other P2 pins. Sun-supplied boards meet these
          requirements.

        J500    hardwired jumper        Ethernet interrupt level
          Sets the Ethernet interrupt level. Pins 7-8 are hardwired
          together, setting the interrupt level to 3. Level 7 is closest
          to the edge of the board, level 0 closest to the center.

        Power requirements are +5V @ 6A and +12V @ 0.5A.


    Communications boards
    ---------------------

501-1006        Sun-2 SCSI/serial Multibus
        See under "SCSI boards".

xxx-xxxx        Systech MTI-800A/1600A Multiple Terminal Interface Multibus
        There are two parts to the MTI-800A/1600A: a Multibus controller
        board and a 19" rack-mountable chassis with eight (800A) or
        sixteen (1600A) serial ports. The board should not share a
        Multibus P2 section with Sun-2 CPU or memory boards.

        This board provides two modes of operation: single character
        transfer mode, in which data is transferred one character at a
        time to or from the CPU, and block transfer mode, in which data
        is moved between the board and memory via DMA. In this mode, the
        board is a Multibus bus master and supports CBRQ.

        This board has four eight-position DIP switches, near the center
        of the board.

        DIP switch information:

        SW2     address
          Switches 6 and 7 ON and all others OFF.

        SW3     address/default channel configuration
          1,2   OFF (?)
          3     ON; between this and SW2, address set to 0x0620.
          4,5   OFF (?)
          6     8/16-bit addressing, ON/OFF respectively. OFF by default.
          7,8   one stop bit, both OFF

        SW4     default channel configuration
          1,2   no parity, both OFF
          3,4   eight bits, both ON
          5-8   9600 baud: 5, 6, and 7 ON, 8 OFF

        SW5     interrupt level
          Switch 5 ON, all others OFF, for interrupt level 4

xxx-xxxx        Systech VPC-2200 Versatec Printer/Plotter controller Multibus
        This board should not share a Multibus P2 section with Sun-2 CPU
        or memory boards.

        This board is a Multibus bus-mastering DMA board with CBRQ
        support. It supports two output channels: one channel supports
        the Versatec printer/plotter in either single-ended or
        long-lines differential mode, and the second supports any
        standard Centronics- or Dataproducts-compatible printer at rates
        up to 10,000 lines per minute. The two modes of the first
        channel are transparent to the software. The second channel has
        automatic printer selection which eliminates the need for
        setting switches for either Centronics- or Dataproducts-type
        printers.

        This board has a self-test feature for both channels that does
        not require any software support. The Versatec channel sends a
        132-character ASCII string in print mode and a 256-byte pattern
        in plot mode. The printer channel sends a 132-character ASCII
        string.

        DIP switch information:

        SW3     8/16-bit I/O, big/little-endian, 8/16-bit addressing, address
          Switches 3, 4, 5, 6, and 7 should be ON, all others OFF.

        SW4     address
          Switch 3 OFF, all others ON. Between this and SW3, the base
          address is set to 0x0480.

        SW5     interrupt priority
          Switch 3 ON, all others OFF, for interrupt priority 2.


    Floating-point and other system accelerators
    --------------------------------------------

370-1021        Sky Floating Point Processor Multibus
        This board must not share a Multibus P2 section with any Sun
        board which also uses the P2 bus.

        This board is an IEEE-compliant floating point coprocessor with
        a Weitek chip.

        This board has two jumper blocks, JP01 and JP02, in the lower
        left corner of the board (with the Multibus edge connector
        facing down and the component side facing you). These are
        14-position blocks; pin 1 is in the lower left, pin 7 the lower
        right, pin 8 the upper right, and pin 14 the upper left.

        Jumper information:

        JP01    address
          As wired by Sky: 1-2 jumped
          AS WIRED FOR USE IN A SUN: 1-11 jumped, address 0x2000

        JP02    interrupt level
          As wired by Sky: 2-6, 4-5 jumped
          AS WIRED FOR USE IN A SUN: 1-6, 3-6, 4-5 jumped, interrupt level 2

        Power requirements are +5V @ 4A.


    Cardcage backplanes
    -------------------

501-1090        2/120 Multibus
        Nine-slot passive Multibus backplane. Slot 6 must be occupied by
        either a monochrome framebuffer board or a P2 terminator board.

    Other boards
    ------------

501-1054        Multibus-VME Adapter
        This board/frame accepts a normal Multibus card and connects it
        electrically to a VME bus. It has twelve DIP switch blocks, a
        PROM socket, and two jumpers, to allow it to be configured for
        any particular board. It was initially introduced after the
        transition to VME chassis in the Sun-2 era, and adapted Multibus
        boards such as the Xylogics 451 SMD disk controller were
        supported through the Sun-4 VME models.

        DIP switch blocks 1 through 4 determine access to Multibus I/O
        space from the VME bus. DIP switch blocks 5 through 8 determine
        access to Multibus memory from the VME bus. DIP switch blocks 9
        and 10 are unused. DIP switch block 11 is used with 20-bit-DMA
        Multibus boards. DIP switch block 12 and the PROM socket map
        Multibus interrupts to VME interrupts. The jumper block controls
        the multibus BCLK and CCLK.

        Multibus I/O space is mapped into the VME 16-bit address space.
        Multibus memory space is mapped into the VME 24-bit address
        space. Note that the address is the same on both buses (e.g. the
        Xylogics 450 appears at Multibus I/O address 0xEE40; therefore
        it will appear at VME address 0xEE40 as well).

        SW1     Multibus I/O addresses, low
          1     unused
          2-8   A7-A1 in reverse order (2 is A7, 3 is A6, 8 is A1, etc.)

        SW2     Multibus I/O block size, low
          1     unused
          2-8   A7-A1 in reverse order (2 is A7, 3 is A6, 8 is A1, etc.)

        SW3     Multibus I/O addresses, high
          1-8   A15-A8 in reverse order (1 is A15, 2 is A14, 8 is A8,
                 etc.)

        SW4     Multibus I/O block size, high
          1-8   A15-A8 in reverse order (1 is A15, 2 is A14, 8 is A8,
                 etc.)

        SW5     Multibus memory addresses, low
          1-8   A15-A8 in reverse order (1 is A15, 2 is A14, 8 is A8,
                 etc.)

        SW6     Multibus memory block size, low
          1-8   A15-A8 in reverse order (1 is A15, 2 is A14, 8 is A8,
                 etc.)

        SW7     Multibus memory addresses, high
          1-8   A23-A16 in reverse order (1 is A23, 2 is A22, 8 is A16,
                 etc.)

        SW8     Multibus memory block size, high
          1-8   A23-A16 in reverse order (1 is A23, 2 is A22, 8 is A16,
                 etc.)

        SW9     Unused

        SW10    Unused

        SW11    20-bit-DMA
          1-4   A23-A20 in reverse order (1 is A23, 2 is A22, 4 is A20,.
                 etc.)
          5-8   unused

        SW12    VME interrupt vector
          1-8   Vector, LSB to MSB. Maps all Multibus interrupts to the
                 same VME vector. Use the PROM to map different Multibus
                 interrupts to different VME vectors. If the PROM is
                 installed, all switches in this block must be OFF.

        J1      BCLK and CCLK (9.8304MHz)
          1-2   jumped to provide Multibus bus clock (BLCK) to the
                 board, unjumped to not. Most boards require this clock
                 signal.
          3-4   jumped to provide Multibus constant clock (CCLK) to the
                 board, unjumped to not. Most boards require this clock
                 signal.

        To set the Multibus I/O switches (blocks 1 through 4):

        1) Find the block size for your board. If it is not a power of
           two, round it up to the nearest power of two.

        2) Subtract one and throw away the lowest bit (A0 is not connected
           to the switches -- the smallest possible block is two bytes).

        3) For each zero bit, turn the corresponding switch ON, and OFF
           for each one bit, in SW2 and SW4. Remember that the address
           lines are reversed in the switch positions!

        4) Find the base address for your board and bitwise-OR it with
           the result from step 2, throwing away the lowest bit (A0 is
           not connected to the switches).

        5) For each zero bit, turn the corresponding switch ON, and OFF
           for each one bit, in SW1 and SW3. Remember that the address
           lines are reversed in the switch positions!

        If you don't want to map any Multibus I/O space, set all
        switches in SW1 and SW3 to ON, and SW2 and SW4 to OFF.

        To set the Multibus memory switches (blocks 5 through 8):

        1) Find the block size for your board. If it is not a power of
           two, round it up to the nearest power of two.

        2) Throw away the low byte (A0-A7 are not used -- the smallest
           address increment is 256 bytes) and subtract one.

        3) For each zero bit, turn the corresponding switch ON, and OFF
           for each one bit, in SW6 and SW8. Remember that the address
           lines are reversed in the switch positions!

        4) Find the base address for your board and throw away the low
           byte (A0-A7 are not used).

        5) Bitwise-OR it with the result from step 2.

        6) For each zero bit, turn the corresponding switch ON, and OFF
           for each one bit, in SW5 and SW7. Remember that the address
           lines are reversed in the switch positions!

        If you don't want to map any Multibus memory, set all
        switches in SW5 and SW7 to ON, and SW6 and SW8 to OFF.

        If the Multibus board is a 24-bit-DMA master, set all switches
        in SW11 to OFF. Otherwise, if it is a 20-bit-DMA master, use
        switches 1-4 in SW11 to supply the A20-A23 of the DMA address.
        As usual, 0 is ON and 1 is OFF. Note that "to access Sun main
        memory via DVMA, these bits should be set to zero."

        To use SW12 to set the VME interrupt vector, simply set the
        desired vector value in the switches. As usual, 0 is ON and 1 is
        OFF. To use the PROM to set VME interrupt vectors, program a
        32-by-8 bipolar PROM with the vectors for Multibus interrupt
        levels 7 through 1 in locations 0 through 6 respectively
        (reversed). Note that Multibus interrupt 0 cannot be mapped,
        "since the VMEbus has no level 0 interrupt."

        Example: the 370-1012 Xylogics 450 SMD disk controller uses no
        Multibus memory, has 8 bytes of Multibus I/O at address 0xEE40
        (for the first controller), is a 24-bit-DMA board, wants VME
        interrupt vector 0x48, and requires BCLK and CCLK. Hence:

                         1    2    3    4    5    6    7    8
                SW1     (un) ON   OFF  ON   ON   ON   OFF  OFF
                SW2     (un) ON   ON   ON   ON   ON   OFF  OFF
                SW3     OFF  OFF  OFF  ON   OFF  OFF  OFF  ON
                SW4               -- all ON --
                SW5               -- all ON --
                SW6               -- all OFF --
                SW7               -- all ON --
                SW8               -- all OFF --
                SW11              -- all OFF --
                SW12    ON   ON   ON   OFF  ON   ON   OFF  ON
                J1          -- pins 1-2, 3-4 jumped --

        Example: the 370-0502 (0167?) CPC Tapemaster 1/2" tape
        controller uses no Multibus memory, has two bytes of Multibus
        I/O at address 0x00A0, is a 20-bit-DMA board, wants VME
        interrupt vector 0x60, and requires BCLK and CCLK. Hence:

                         1    2    3    4    5    6    7    8
                SW1     (un) OFF  ON   OFF  ON   ON   ON   ON
                SW2     (un) ON   ON   ON   ON   ON   ON   ON
                SW3               -- all ON --
                SW4               -- all ON --
                SW5               -- all ON --
                SW6               -- all OFF --
                SW7               -- all ON --
                SW8               -- all OFF --
                SW11              -- all OFF --
                SW12    ON   ON   ON   ON   ON   OFF  OFF  ON
                J1          -- pins 1-2, 3-4 jumped --

501-1483        DC to DC converter for 501-1637 in 3/80
        Needed to supply -5V to 501-1637 mgthree framebuffer when
        installed in a 3/80 and using a 1600 x 1280 high resolution
        monitor.

        Has a ten-pin connector (J1) in one corner, with pin 1 squared and
        pins numbered by pairs. The -5V output can be measured on pins 1
        and 10 (in opposite corner) of J1 and on pins 31 and 63 of the
        CPU's P4 connector.

        Power requirements of this board with the 501-1637 are +5V @
        2.7A.

501-1671        SPARCcenter 2000 system control board
        This board provides the hostid, Ethernet address, and possibly
        other stuff to the motherboards installed in a SPARCcenter 2000.

        It has a 'JTAG' connector at J0101 and a set of eight LEDs, half
        yellow and half green. From the yellow end:

                SVP     Service Processor Attached                      Y
                RST     System Reset                                    Y
                STP0    Stop Request from CARB0 ASIC                    Y
                STP1    Stop Request from CARB1 ASIC                    Y
                Vbb     -12VDC OK                                       G
                Vdd     +12VDC OK                                       G
                Vtt     +1.2VDC OK                                      G
                Vcc     +5VDC OK                                        G

        At location U0203 is the EEPROM, a 2K x 8-bit TMS29F816, which
        contains the hostid and Ethernet address. This part is not
        field-replaceable. If the contents of the system control board
        EEPROM are invalid, the values stored in the NVRAM on system
        board 0 are used instead, and the yellow LED on the keyswitch
        interface board is ON.

        The update-system-idprom ROM monitor command downloads the
        contents of the system board 0 NVRAM to the EEPROM on the system
        control board. At least version 2.11 is required to do this.

        To invalidate the contents of the system control board EEPROM,
        use the following sequence of commands:
                patch noop call update-system-idprom
                patch noop call update-system-idprom
                patch call noop update-system-idprom
                update-system-idprom

501-1979        SPARCserver 1000 system control board
        This board provides the hostid, Ethernet address, and possibly
        other stuff to the motherboards installed in a SPARCserver 1000.

        It has a variety of connectors, and a reset switch in one
        corner.

        J0101   'JTAG'

        J1001   '5 1/4" SCSI power'

        J1002   '3 1/2" SCSI power'

        J1003   '3 1/2" SCSI power'

        J1004   'Internal SCSI bus'

        At location U0201 is the EEPROM, a 2K x 8-bit TMS29F816, which
        contains the hostid and Ethernet address. This part is not
        field-replaceable. If the contents of the system control board
        EEPROM are invalid, the values stored in the NVRAM on system
        board 0 are used instead, and the yellow LED on the power supply
        is ON.

        The update-system-idprom ROM monitor command downloads the
        contents of the system board 0 NVRAM to the EEPROM on the system
        control board. At least version 2.11 is required to do this.

        To invalidate the contents of the system control board EEPROM,
        use the following sequence of commands:
                patch noop call update-system-idprom
                patch noop call update-system-idprom
                patch call noop update-system-idprom
                update-system-idprom

501-2335        SPARCcenter 2000 system control board
        See 501-1671.

501-2406        SPARCcenter 2000 system control board unprogrammed
        See 501-1671.

501-2412        SPARCserver 1000 system control board unprogrammed
        See 501-1979.

              END OF PART IV OF THE SUN HARDWARE REFERENCE